On 7/8/22 17:07, Liviu Dudau wrote:
On Mon, Jun 06, 2022 at 12:47:13PM +0100, carsten.haitz...@foss.arm.com wrote:
From: Carsten Haitzler <carsten.haitz...@arm.com>
If something has already set up the DPU before the komeda driver comes
up, it will fail to init because it was just writing to the SRST bit in
the GCU control register and ignoring others. This resulted in TBU
bringup stalling and init failing. By writing completely we also set the
mode back to 0 (inactive) too and thus TBU bringup works.
This is a rather large hammer, tbh. I would like to see if there is a better
way of
handling the handover from EFIFB that this patch is trying to fix, but I lack an
usable plaform for that. It will generate a flicker at module load time, but if
users
of Morello are happy with that, then
We're pretty happy with that setup right now. Certainly better than
Komeda failing to init.
Acked-by: Liviu Dudau <liviu.du...@arm.com>
Best regards,
Liviu
Signed-off-by: Carsten Haitzler <carsten.haitz...@arm.com>
---
drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
index 00fa56c29b3e..39618c1a4c81 100644
--- a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
+++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
@@ -309,8 +309,7 @@ static int d71_reset(struct d71_dev *d71)
u32 __iomem *gcu = d71->gcu_addr;
int ret;
- malidp_write32_mask(gcu, BLK_CONTROL,
- GCU_CONTROL_SRST, GCU_CONTROL_SRST);
+ malidp_write32(gcu, BLK_CONTROL, GCU_CONTROL_SRST);
ret = dp_wait_cond(!(malidp_read32(gcu, BLK_CONTROL) & GCU_CONTROL_SRST),
100, 1000, 10000);
--
2.32.0
