Hi Adam,
thanks for working on this.
Am Samstag, 3. Februar 2024, 17:52:46 CET schrieb Adam Ford:
> From: Lucas Stach <l.st...@pengutronix.de>
>
> The HDMI irqsteer is a secondary interrupt controller within the HDMI
> subsystem that maps all HDMI peripheral IRQs into a single upstream
> IRQ line.
>
> Signed-off-by: Lucas Stach <l.st...@pengutronix.de>
> ---
> arch/arm64/boot/dts/freescale/imx8mp.dtsi | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index
> 5c54073de615..5e51a766f3d9 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -1399,6 +1399,19 @@ hdmi_blk_ctrl: blk-ctrl@32fc0000 {
> "hdcp",
"hrv";
> #power-domain-cells = <1>;
> };
> +
> + irqsteer_hdmi: interrupt-controller@32fc2000 {
> + compatible = "fsl,imx-irqsteer";
> + reg = <0x32fc2000 0x44>;
> + interrupts = <GIC_SPI 43
IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + fsl,channel = <1>;
> + fsl,num-irqs = <64>;
> + clocks = <&clk IMX8MP_CLK_HDMI_APB>;
> + clock-names = "ipg";
> + power-domains = <&hdmi_blk_ctrl
IMX8MP_HDMIBLK_PD_IRQSTEER>;
> + };
According to RM this block is part of HDMI_TX which is part of AIPS4, so it
should be below hsio_blk_ctrl.
Best regards,
Alexander
> };
>
> aips5: bus@30c00000 {
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