There are 2 interfaces and 4 pingpong in quad pipe. Map the 2nd
interface to 3rd PP instead of the 2nd PP.

Signed-off-by: Jun Nie <jun....@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.barysh...@linaro.org>
Reviewed-by: Jessica Zhang <quic_jessz...@quicinc.com>
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 
3edfcd7d49c1efb2b7ed2b9f0cc38a4b3073acf6..3e4ff345bd6d9c0e2a08274874fac40690409cf0
 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -1157,7 +1157,7 @@ static void dpu_encoder_virt_atomic_mode_set(struct 
drm_encoder *drm_enc,
        struct dpu_hw_blk *hw_ctl[MAX_CHANNELS_PER_ENC];
        struct dpu_hw_blk *hw_dsc[MAX_CHANNELS_PER_ENC];
        struct dpu_hw_blk *hw_cwb[MAX_CHANNELS_PER_ENC];
-       int num_ctl, num_pp, num_dsc;
+       int num_ctl, num_pp, num_dsc, num_pp_per_intf;
        int num_cwb = 0;
        bool is_cwb_encoder;
        unsigned int dsc_mask = 0;
@@ -1236,10 +1236,16 @@ static void dpu_encoder_virt_atomic_mode_set(struct 
drm_encoder *drm_enc,
                dpu_enc->cur_master->hw_cdm = hw_cdm ? to_dpu_hw_cdm(hw_cdm) : 
NULL;
        }
 
+       /*
+        * There may be 4 PP and 2 INTF for quad pipe case, so INTF is not
+        * mapped to PP 1:1. Let's calculate the stride with pipe/INTF
+        */
+       num_pp_per_intf = num_pp / dpu_enc->num_phys_encs;
+
        for (i = 0; i < dpu_enc->num_phys_encs; i++) {
                struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];
 
-               phys->hw_pp = dpu_enc->hw_pp[i];
+               phys->hw_pp = dpu_enc->hw_pp[num_pp_per_intf * i];
                if (!phys->hw_pp) {
                        DPU_ERROR_ENC(dpu_enc,
                                "no pp block assigned at idx: %d\n", i);

-- 
2.34.1

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