On Thu, May 15, 2025 at 04:33:41PM +0300, Alexander Usyskin wrote:
> Enable access to internal non-volatile memory on
> DGFX devices via a child device.
> The nvm child device is exposed via auxiliary bus.
...
> +void intel_nvm_init(struct drm_i915_private *i915)
> +{
Lucas recently revamped xe driver to address this, so let's not hide bugs
and return an error where possible.
> + struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
> + struct intel_dg_nvm_dev *nvm;
> + struct auxiliary_device *aux_dev;
> + int ret;
> +
> + /* Only the DGFX devices have internal NVM */
> + if (!IS_DGFX(i915))
> + return;
> +
> + /* Nvm pointer should be NULL here */
> + if (WARN_ON(i915->nvm))
> + return;
> +
> + i915->nvm = kzalloc(sizeof(*nvm), GFP_KERNEL);
> + if (!i915->nvm)
> + return;
> +
> + nvm = i915->nvm;
> +
> + nvm->writeable_override = true;
> + nvm->bar.parent = &pdev->resource[0];
> + nvm->bar.start = GEN12_GUNIT_NVM_BASE + pdev->resource[0].start;
> + nvm->bar.end = nvm->bar.start + GEN12_GUNIT_NVM_SIZE - 1;
> + nvm->bar.flags = IORESOURCE_MEM;
> + nvm->bar.desc = IORES_DESC_NONE;
> + nvm->regions = regions;
> +
> + aux_dev = &nvm->aux_dev;
> +
> + aux_dev->name = "nvm";
> + aux_dev->id = (pci_domain_nr(pdev->bus) << 16) |
> + PCI_DEVID(pdev->bus->number, pdev->devfn);
Why not just pci_dev_id()?
> + aux_dev->dev.parent = &pdev->dev;
> + aux_dev->dev.release = i915_nvm_release_dev;
> +
> + ret = auxiliary_device_init(aux_dev);
> + if (ret) {
> + drm_err(&i915->drm, "i915-nvm aux init failed %d\n", ret);
> + return;
> + }
> +
> + ret = auxiliary_device_add(aux_dev);
> + if (ret) {
> + drm_err(&i915->drm, "i915-nvm aux add failed %d\n", ret);
> + auxiliary_device_uninit(aux_dev);
> + return;
> + }
> +}
Raag
