On Thu, May 15, 2025 at 04:33:43PM +0300, Alexander Usyskin wrote:
> Enable access to internal non-volatile memory on DGFX
> with GSC/CSC devices via a child device.
> The nvm child device is exposed via auxiliary bus.
...
> +void xe_nvm_init(struct xe_device *xe)
> +{
Same as patch 6, please handle errors.
> + struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
> + struct intel_dg_nvm_dev *nvm;
> + struct auxiliary_device *aux_dev;
> + int ret;
> +
> + if (!xe->info.has_gsc_nvm)
> + return;
> +
> + /* No access to internal NVM from VFs */
> + if (IS_SRIOV_VF(xe))
> + return;
> +
> + /* Nvm pointer should be NULL here */
> + if (WARN_ON(xe->nvm))
> + return;
> +
> + xe->nvm = kzalloc(sizeof(*nvm), GFP_KERNEL);
> + if (!xe->nvm)
> + return;
> +
> + nvm = xe->nvm;
> +
> + nvm->writeable_override = false;
> + nvm->bar.parent = &pdev->resource[0];
> + nvm->bar.start = GEN12_GUNIT_NVM_BASE + pdev->resource[0].start;
> + nvm->bar.end = nvm->bar.start + GEN12_GUNIT_NVM_SIZE - 1;
Just out of curiosity, why off by one? Aren't ioremaps all PAGE_SIZEd?
> + nvm->bar.flags = IORESOURCE_MEM;
> + nvm->bar.desc = IORES_DESC_NONE;
> + nvm->regions = regions;
> +
> + aux_dev = &nvm->aux_dev;
> +
> + aux_dev->name = "nvm";
> + aux_dev->id = (pci_domain_nr(pdev->bus) << 16) |
> + PCI_DEVID(pdev->bus->number, pdev->devfn);
Ditto as patch 6.
> + aux_dev->dev.parent = &pdev->dev;
> + aux_dev->dev.release = xe_nvm_release_dev;
> +
> + ret = auxiliary_device_init(aux_dev);
> + if (ret) {
> + drm_err(&xe->drm, "xe-nvm aux init failed %d\n", ret);
> + return;
> + }
> +
> + ret = auxiliary_device_add(aux_dev);
> + if (ret) {
> + drm_err(&xe->drm, "xe-nvm aux add failed %d\n", ret);
> + auxiliary_device_uninit(aux_dev);
> + return;
> + }
> +}
Raag
