Exynos7870's DSIM has separate registers for LINK and DPHY status. This
is in contrast to older variants in the driver which use a single
register for both.

Add a driver data flag which indicates that the device variant supports
the legacy status register. Change the register read calls
appropriately.

Suggested-by: Inki Dae <inki....@samsung.com>
Signed-off-by: Kaustabh Chakraborty <kauschl...@disroot.org>
---
 drivers/gpu/drm/bridge/samsung-dsim.c | 22 ++++++++++++++++++----
 include/drm/bridge/samsung-dsim.h     |  1 +
 2 files changed, 19 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c 
b/drivers/gpu/drm/bridge/samsung-dsim.c
index 
c4997795db18280903570646b0a5b2c03b666307..0b061ad0ecec158f994846da08fae59f74bfa091
 100644
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -31,7 +31,7 @@
 /* returns true iff both arguments logically differs */
 #define NEQV(a, b) (!(a) ^ !(b))
 
-/* DSIM_STATUS */
+/* DSIM_STATUS or DSIM_DPHY_STATUS */
 #define DSIM_STOP_STATE_DAT(x)         (((x) & 0xf) << 0)
 #define DSIM_STOP_STATE_CLK            BIT(8)
 #define DSIM_TX_READY_HS_CLK           BIT(10)
@@ -240,7 +240,9 @@ enum samsung_dsim_transfer_type {
 };
 
 enum reg_idx {
-       DSIM_STATUS_REG,        /* Status register */
+       DSIM_STATUS_REG,        /* Status register (legacy) */
+       DSIM_LINK_STATUS_REG,   /* Link status register */
+       DSIM_DPHY_STATUS_REG,   /* D-PHY status register */
        DSIM_SWRST_REG,         /* Software reset register */
        DSIM_CLKCTRL_REG,       /* Clock control register */
        DSIM_TIMEOUT_REG,       /* Time out register */
@@ -405,6 +407,7 @@ static const unsigned int imx8mm_dsim_reg_values[] = {
 static const struct samsung_dsim_driver_data exynos3_dsi_driver_data = {
        .reg_ofs = exynos_reg_ofs,
        .plltmr_reg = 0x50,
+       .has_legacy_status_reg = 1,
        .has_freqband = 1,
        .has_clklane_stop = 1,
        .num_clks = 2,
@@ -424,6 +427,7 @@ static const struct samsung_dsim_driver_data 
exynos3_dsi_driver_data = {
 static const struct samsung_dsim_driver_data exynos4_dsi_driver_data = {
        .reg_ofs = exynos_reg_ofs,
        .plltmr_reg = 0x50,
+       .has_legacy_status_reg = 1,
        .has_freqband = 1,
        .has_clklane_stop = 1,
        .num_clks = 2,
@@ -443,6 +447,7 @@ static const struct samsung_dsim_driver_data 
exynos4_dsi_driver_data = {
 static const struct samsung_dsim_driver_data exynos5_dsi_driver_data = {
        .reg_ofs = exynos_reg_ofs,
        .plltmr_reg = 0x58,
+       .has_legacy_status_reg = 1,
        .num_clks = 2,
        .max_freq = 1000,
        .wait_for_reset = 1,
@@ -459,6 +464,7 @@ static const struct samsung_dsim_driver_data 
exynos5_dsi_driver_data = {
 static const struct samsung_dsim_driver_data exynos5433_dsi_driver_data = {
        .reg_ofs = exynos5433_reg_ofs,
        .plltmr_reg = 0xa0,
+       .has_legacy_status_reg = 1,
        .has_clklane_stop = 1,
        .num_clks = 5,
        .max_freq = 1500,
@@ -476,6 +482,7 @@ static const struct samsung_dsim_driver_data 
exynos5433_dsi_driver_data = {
 static const struct samsung_dsim_driver_data exynos5422_dsi_driver_data = {
        .reg_ofs = exynos5433_reg_ofs,
        .plltmr_reg = 0xa0,
+       .has_legacy_status_reg = 1,
        .has_clklane_stop = 1,
        .num_clks = 2,
        .max_freq = 1500,
@@ -493,6 +500,7 @@ static const struct samsung_dsim_driver_data 
exynos5422_dsi_driver_data = {
 static const struct samsung_dsim_driver_data imx8mm_dsi_driver_data = {
        .reg_ofs = exynos5433_reg_ofs,
        .plltmr_reg = 0xa0,
+       .has_legacy_status_reg = 1,
        .has_clklane_stop = 1,
        .num_clks = 2,
        .max_freq = 2100,
@@ -688,7 +696,10 @@ static unsigned long samsung_dsim_set_pll(struct 
samsung_dsim *dsi,
                        dev_err(dsi->dev, "PLL failed to stabilize\n");
                        return 0;
                }
-               reg = samsung_dsim_read(dsi, DSIM_STATUS_REG);
+               if (driver_data->has_legacy_status_reg)
+                       reg = samsung_dsim_read(dsi, DSIM_STATUS_REG);
+               else
+                       reg = samsung_dsim_read(dsi, DSIM_LINK_STATUS_REG);
        } while ((reg & DSIM_PLL_STABLE) == 0);
 
        dsi->hs_clock = fout;
@@ -962,7 +973,10 @@ static int samsung_dsim_init_link(struct samsung_dsim *dsi)
                        return -EFAULT;
                }
 
-               reg = samsung_dsim_read(dsi, DSIM_STATUS_REG);
+               if (driver_data->has_legacy_status_reg)
+                       reg = samsung_dsim_read(dsi, DSIM_STATUS_REG);
+               else
+                       reg = samsung_dsim_read(dsi, DSIM_DPHY_STATUS_REG);
                if ((reg & DSIM_STOP_STATE_DAT(lanes_mask))
                    != DSIM_STOP_STATE_DAT(lanes_mask))
                        continue;
diff --git a/include/drm/bridge/samsung-dsim.h 
b/include/drm/bridge/samsung-dsim.h
index 
9764d6eb5beb98b5b9427c5c4775c37b24dd6e17..d7877191bad155e877b2812daeb81ac0be6f735c
 100644
--- a/include/drm/bridge/samsung-dsim.h
+++ b/include/drm/bridge/samsung-dsim.h
@@ -53,6 +53,7 @@ struct samsung_dsim_transfer {
 struct samsung_dsim_driver_data {
        const unsigned int *reg_ofs;
        unsigned int plltmr_reg;
+       unsigned int has_legacy_status_reg:1;
        unsigned int has_freqband:1;
        unsigned int has_clklane_stop:1;
        unsigned int has_broken_fifoctrl_emptyhdr:1;

-- 
2.49.0

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