[PATCH v3 02/13] drm/bridge: samsung-dsim: add SFRCTRL register

[Kaustabh Chakraborty]

On Exynos7870 devices, enabling the display requires disabling
standby by writing to the SFRCTRL register. Add the register and related
bit values. Since this behavior isn't available on other SoCs, implement
a flag in the driver data struct indicating the availability of this
feature.

Signed-off-by: Kaustabh Chakraborty <kauschl...@disroot.org>
---
 drivers/gpu/drm/bridge/samsung-dsim.c | 16 ++++++++++++++++
 include/drm/bridge/samsung-dsim.h     |  1 +
 2 files changed, 17 insertions(+)

diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c 
b/drivers/gpu/drm/bridge/samsung-dsim.c
index 
0b061ad0ecec158f994846da08fae59f74bfa091..dca3939dd99fa07aee309067b93e652bc9a9b78f
 100644
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -157,6 +157,11 @@
 #define DSIM_INT_RX_ECC_ERR            BIT(15)
 #define DSIM_INT_RX_CRC_ERR            BIT(14)
 
+/* DSIM_SFRCTRL */
+#define DSIM_SFR_CTRL_STAND_BY         BIT(4)
+#define DSIM_SFR_CTRL_SHADOW_UPDATE    BIT(1)
+#define DSIM_SFR_CTRL_SHADOW_EN                BIT(0)
+
 /* DSIM_FIFOCTRL */
 #define DSIM_RX_DATA_FULL              BIT(25)
 #define DSIM_RX_DATA_EMPTY             BIT(24)
@@ -257,6 +262,7 @@ enum reg_idx {
        DSIM_PKTHDR_REG,        /* Packet Header FIFO register */
        DSIM_PAYLOAD_REG,       /* Payload FIFO register */
        DSIM_RXFIFO_REG,        /* Read FIFO register */
+       DSIM_SFRCTRL_REG,       /* SFR standby and shadow control register */
        DSIM_FIFOCTRL_REG,      /* FIFO status and control register */
        DSIM_PLLCTRL_REG,       /* PLL control register */
        DSIM_PHYCTRL_REG,
@@ -1037,6 +1043,7 @@ static void samsung_dsim_set_display_mode(struct 
samsung_dsim *dsi)
 
 static void samsung_dsim_set_display_enable(struct samsung_dsim *dsi, bool 
enable)
 {
+       const struct samsung_dsim_driver_data *driver_data = dsi->driver_data;
        u32 reg;
 
        reg = samsung_dsim_read(dsi, DSIM_MDRESOL_REG);
@@ -1045,6 +1052,15 @@ static void samsung_dsim_set_display_enable(struct 
samsung_dsim *dsi, bool enabl
        else
                reg &= ~DSIM_MAIN_STAND_BY;
        samsung_dsim_write(dsi, DSIM_MDRESOL_REG, reg);
+
+       if (driver_data->has_sfrctrl) {
+               reg = samsung_dsim_read(dsi, DSIM_SFRCTRL_REG);
+               if (enable)
+                       reg |= DSIM_SFR_CTRL_STAND_BY;
+               else
+                       reg &= ~DSIM_SFR_CTRL_STAND_BY;
+               samsung_dsim_write(dsi, DSIM_SFRCTRL_REG, reg);
+       }
 }
 
 static int samsung_dsim_wait_for_hdr_fifo(struct samsung_dsim *dsi)
diff --git a/include/drm/bridge/samsung-dsim.h 
b/include/drm/bridge/samsung-dsim.h
index 
d7877191bad155e877b2812daeb81ac0be6f735c..f0c1e5c5ed490afe0bcfd06830f52471710b29ea
 100644
--- a/include/drm/bridge/samsung-dsim.h
+++ b/include/drm/bridge/samsung-dsim.h
@@ -57,6 +57,7 @@ struct samsung_dsim_driver_data {
        unsigned int has_freqband:1;
        unsigned int has_clklane_stop:1;
        unsigned int has_broken_fifoctrl_emptyhdr:1;
+       unsigned int has_sfrctrl:1;
        unsigned int num_clks;
        unsigned int min_freq;
        unsigned int max_freq;

-- 
2.49.0