Newer DPU revisions with the same register layout, such as the one used
in UMS9230 (version 5), require different defaults for the display
interface configuration but otherwise remain compatible with the version
this driver was originally written for.
Check the DPU version register to account for these configuration
differences.
Signed-off-by: Otto Pflüger <otto.pflue...@abscue.de>
---
drivers/gpu/drm/sprd/sprd_dpu.c | 16 ++++++++++++----
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/sprd/sprd_dpu.c b/drivers/gpu/drm/sprd/sprd_dpu.c
index
9d274600e6a80bdfc435f6c6eff77c9dd71cb38c..978d4947e1bc5cd5b13b1f25719268fa08b77297
100644
--- a/drivers/gpu/drm/sprd/sprd_dpu.c
+++ b/drivers/gpu/drm/sprd/sprd_dpu.c
@@ -27,6 +27,7 @@
#include "sprd_dsi.h"
/* Global control registers */
+#define REG_DPU_VERSION 0x00
#define REG_DPU_CTRL 0x04
#define REG_DPU_CFG0 0x08
#define REG_PANEL_SIZE 0x20
@@ -406,6 +407,7 @@ static void sprd_dpu_init(struct sprd_dpu *dpu)
{
struct dpu_context *ctx = &dpu->ctx;
u32 int_mask = 0;
+ u32 dpu_version = readl(ctx->base + REG_DPU_VERSION);
writel(0x00, ctx->base + REG_BG_COLOR);
writel(0x00, ctx->base + REG_MMU_EN);
@@ -418,10 +420,16 @@ static void sprd_dpu_init(struct sprd_dpu *dpu)
if (ctx->if_type == SPRD_DPU_IF_DPI) {
/* use dpi as interface */
dpu_reg_clr(ctx, REG_DPU_CFG0, BIT_DPU_IF_EDPI);
- /* disable Halt function for SPRD DSI */
- dpu_reg_clr(ctx, REG_DPI_CTRL, BIT_DPU_DPI_HALT_EN);
- /* select te from external pad */
- dpu_reg_set(ctx, REG_DPI_CTRL, BIT_DPU_EDPI_FROM_EXTERNAL_PAD);
+
+ if (dpu_version < 0x300) {
+ /* disable Halt function for SPRD DSI */
+ dpu_reg_clr(ctx, REG_DPI_CTRL, BIT_DPU_DPI_HALT_EN);
+ /* select te from external pad */
+ dpu_reg_set(ctx, REG_DPI_CTRL,
BIT_DPU_EDPI_FROM_EXTERNAL_PAD);
+ } else {
+ /* enable Halt function for SPRD DSI */
+ dpu_reg_set(ctx, REG_DPI_CTRL, BIT_DPU_DPI_HALT_EN);
+ }
/* enable dpu update done INT */
int_mask |= BIT_DPU_INT_UPDATE_DONE;
--
2.50.0
