On 7/23/25 2:15 PM, Rob Clark wrote:
> On Wed, Jul 23, 2025 at 3:19 AM Konrad Dybcio
> <konrad.dyb...@oss.qualcomm.com> wrote:
>>
>> On 7/20/25 2:16 PM, Akhil P Oommen wrote:
>>> CP_ALWAYS_ON counter falls under GX domain which is collapsed during
>>> IFPC. So switch to GMU_ALWAYS_ON counter for any CPU reads since it is
>>> not impacted by IFPC. Both counters are clocked by same xo clock source.
>>>
>>> Signed-off-by: Akhil P Oommen <akhi...@oss.qualcomm.com>
>>> ---
>>> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 30 ++++++++++++++++--------------
>>> 1 file changed, 16 insertions(+), 14 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
>>> b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
>>> index
>>> 6770f0363e7284e4596b1188637a4615d2c0779b..f000915a4c2698a85b45bd3c92e590f14999d10d
>>> 100644
>>> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
>>> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
>>> @@ -16,6 +16,19 @@
>>>
>>> #define GPU_PAS_ID 13
>>>
>>> +static u64 read_gmu_ao_counter(struct a6xx_gpu *a6xx_gpu)
>>> +{
>>> + u64 count_hi, count_lo, temp;
>>> +
>>> + do {
>>> + count_hi = gmu_read(&a6xx_gpu->gmu,
>>> REG_A6XX_GMU_ALWAYS_ON_COUNTER_H);
>>> + count_lo = gmu_read(&a6xx_gpu->gmu,
>>> REG_A6XX_GMU_ALWAYS_ON_COUNTER_L);
>>> + temp = gmu_read(&a6xx_gpu->gmu,
>>> REG_A6XX_GMU_ALWAYS_ON_COUNTER_H);
>>> + } while (count_hi != temp);
>>
>> The original logic is as follows:
>>
>> static u64 gen7_read_alwayson(struct adreno_device *adreno_dev)
>> {
>> struct kgsl_device *device = KGSL_DEVICE(adreno_dev);
>> u32 lo = 0, hi = 0, tmp = 0;
>>
>> /* Always use the GMU AO counter when doing a AHB read */
>> gmu_core_regread(device, GEN7_GMU_ALWAYS_ON_COUNTER_H, &hi);
>> gmu_core_regread(device, GEN7_GMU_ALWAYS_ON_COUNTER_L, &lo);
>>
>> /* Check for overflow */
>> gmu_core_regread(device, GEN7_GMU_ALWAYS_ON_COUNTER_H, &tmp);
>>
>> if (hi != tmp) {
>> gmu_core_regread(device, GEN7_GMU_ALWAYS_ON_COUNTER_L,
>> &lo);
>> hi = tmp;
>> }
>>
>> return (((u64) hi) << 32) | lo;
>> }
>>
>> Doing this in a while-loop almost looks like you want a lot of time to
>> pass - REG_WIDTH(u32?)/19.2 MHz
>
> would:
>
> } while (unlikely(count_hi != temp));
>
> make it more clear?
I guess so
Konrad
