On Sat, Oct 11, 2025 at 06:51:46PM +0200, Marek Vasut wrote:
> Split i.MX95 LVDS CSR into separate binding document, as it is different
> enough from the other CSR in the block controller binding document and
> has subnodes too.
>
> Signed-off-by: Marek Vasut <[email protected]>
> ---
> Cc: Abel Vesa <[email protected]>
> Cc: Conor Dooley <[email protected]>
> Cc: Fabio Estevam <[email protected]>
> Cc: Krzysztof Kozlowski <[email protected]>
> Cc: Laurent Pinchart <[email protected]>
> Cc: Liu Ying <[email protected]>
> Cc: Lucas Stach <[email protected]>
> Cc: Peng Fan <[email protected]>
> Cc: Pengutronix Kernel Team <[email protected]>
> Cc: Rob Herring <[email protected]>
> Cc: Shawn Guo <[email protected]>
> Cc: Thomas Zimmermann <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> ---
>  .../bindings/clock/nxp,imx95-blk-ctl.yaml     |  1 -
>  .../clock/nxp,imx95-lvds-blk-ctl.yaml         | 80 +++++++++++++++++++
>  2 files changed, 80 insertions(+), 1 deletion(-)
>  create mode 100644 
> Documentation/devicetree/bindings/clock/nxp,imx95-lvds-blk-ctl.yaml
>
> diff --git a/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml 
> b/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml
> index 27403b4c52d62..0a28e24135243 100644
> --- a/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml
> +++ b/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml
> @@ -18,7 +18,6 @@ properties:
>            - nxp,imx95-camera-csr
>            - nxp,imx95-display-csr
>            - nxp,imx95-hsio-blk-ctl
> -          - nxp,imx95-lvds-csr
>            - nxp,imx95-netcmix-blk-ctrl
>            - nxp,imx95-vpu-csr
>        - const: syscon
> diff --git 
> a/Documentation/devicetree/bindings/clock/nxp,imx95-lvds-blk-ctl.yaml 
> b/Documentation/devicetree/bindings/clock/nxp,imx95-lvds-blk-ctl.yaml
> new file mode 100644
> index 0000000000000..663f3ee1df4e0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/nxp,imx95-lvds-blk-ctl.yaml
> @@ -0,0 +1,80 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/nxp,imx95-lvds-blk-ctl.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP i.MX95 LVDS Block Control
> +
> +maintainers:
> +  - Marek Vasut <[email protected]>
> +  - Peng Fan <[email protected]>
> +
> +properties:
> +  compatible:
> +    items:
> +      - const: nxp,imx95-lvds-csr
> +      - const: syscon
> +
> +  reg:
> +    maxItems: 1
> +
> +  power-domains:
> +    maxItems: 1
> +
> +  clocks:
> +    maxItems: 1
> +
> +  '#clock-cells':
> +    const: 1
> +    description:
> +      The clock consumer should specify the desired clock by having the clock
> +      ID in its "clocks" phandle cell. See
> +      include/dt-bindings/clock/nxp,imx95-clock.h
> +
> +  "#address-cells":
> +    const: 1
> +
> +  "#size-cells":
> +    const: 1
> +
> +patternProperties:
> +  "^lvds@[0-9a-f]+$":
> +    type: object
> +    additionalProperties: true
> +
> +    properties:
> +      compatible:
> +        const: fsl,imx95-lvds
> +
> +  "^phy@[0-9a-f]+$":
> +    type: object
> +    additionalProperties: true

Is it standard phy interface? need phy-cells

> +
> +    properties:
> +      compatible:
> +        const: fsl,imx95-ldb
> +
> +required:
> +  - compatible
> +  - reg
> +  - '#clock-cells'
> +  - power-domains
> +  - clocks
> +  - "#address-cells"
> +  - "#size-cells"
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    syscon@4c410000 {
> +      compatible = "nxp,imx95-lvds-csr", "syscon";
> +      #address-cells = <1>;
> +      #size-cells = <1>;
> +      reg = <0x4b0c0000 0x10000>;
> +      #clock-cells = <1>;
> +      clocks = <&scmi_clk 76>;
> +      power-domains = <&scmi_devpd 13>;

Need full examples, included phy and lvds here.

Frank
> +    };
> +...
> --
> 2.51.0
>

Reply via email to