Hi Krzysztof, Rob, On 25-12-18, Krzysztof Kozlowski wrote: > On 15/12/2025 17:17, Marco Felsch wrote: > > Hi Liu, > > > > On 25-12-08, Liu Ying wrote: > >> Hi Marco, > >> > >> On 12/02/2025, Marco Felsch wrote: > >>> From: Liu Ying <[email protected]> > >>> > >>> i.MX93 SoC mediamix blk-ctrl contains one DISPLAY_MUX register which > >>> configures parallel display format by using the "PARALLEL_DISP_FORMAT" > >>> field. Document the Parallel Display Format Configuration(PDFC) subnode > >>> and add the subnode to example. > >>> > >>> Signed-off-by: Liu Ying <[email protected]> > >>> [[email protected]: port to v6.18-rc1] > >>> [[email protected]: add bus-width] > >>> Signed-off-by: Marco Felsch <[email protected]> > >>> --- > >>> .../bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml | 92 > >>> ++++++++++++++++++++++ > >>> 1 file changed, 92 insertions(+) > >>> > >>> diff --git > >>> a/Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml > >>> b/Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml > >>> index > >>> 34aea58094e55365a2f9c86092f637e533f954ff..6e2d86d9341c75108b492bcbabc8a560d8e707cd > >>> 100644 > >>> --- > >>> a/Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml > >>> +++ > >>> b/Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml > >>> @@ -26,6 +26,12 @@ properties: > >>> reg: > >>> maxItems: 1 > >>> > >>> + '#address-cells': > >>> + const: 1 > >>> + > >>> + '#size-cells': > >>> + const: 1 > >>> + > >>> '#power-domain-cells': > >>> const: 1 > >>> > >>> @@ -40,6 +46,60 @@ properties: > >>> minItems: 8 > >>> maxItems: 10 > >>> > >>> + bridge@60: > >> > >> The dependency patch series mentioned in cover letter has two links in it's > >> cover letter. Reading the patch sets pointed by the two links, we may find > >> Krzysztof's comments - the child nodes of the blk-ctrl should be completely > >> documented. > > > > Thanks for pointing this out. > > > > @Krzysztof > > Requesting to add everything seems not feasible if everything added > > should be tested too. > > I don't see why everything should be added in one step, since the base > > .dtsi isn't added in one step too. > > Because otherwise we do not see entire picture and people post incorrect > bindings, claiming they are complete picture, like messing nodes with > addressing and nodes without. So sure, if you do not want to post > complete picture, we cannot review that complete picture, therefore YOU > MUST POST CORRECT CODE. > > I will not be taking excuses later "we did not know that such code is > not allowed". You must know all rules.
We discussed the ranges/reg usage internally as well with the following outcome: - Situation With i.MX8M SoCs NXP introduced MIX domains. Each domain has a so called BLK-CTRL IP. There is no common register layout for the BLK-CTRL IPs. In addition to this, the register fields within one register may not related to the same IP. Please see my below example: The DISP_MUX register configures the DPI output routed to physical SoC pads as well as the internal MIPI-DSI DPI behavior. This PDFC bridge binding is only interested in the first part, not the 2nd. In other words, the BLK-CTRL IP can be seen as a bunch of loose register fields. - Our outcome To be future compatible and extentible, we believe that the best abstraction is the syscon, no mappings (no ranges/regs). A BLK-CTRL sub-device has no address, just the node name. The driver needs to rely on the syscon parent device. All register(-field) handling is done within the sub-device driver. This way new functionallity like MIPI-DSI PLL clock provider driver can be added easily. I will adapt this patchset accordingly, if you agree to rely on the syscon (no regs/ranges). Regards, Marco > > > Best regards, > Krzysztof > -- #gernperDu #CallMeByMyFirstName Pengutronix e.K. | | Steuerwalder Str. 21 | https://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-9 |
