[PATCH v4 20/20] arm64: dts: renesas: r9a09g047e57-smarc: Enable DU1 and DSI support

[Tommaso Merciai]

Enable DU1, DSI and ADV7535 on RZ/G3E SMARC EVK.

Signed-off-by: Tommaso Merciai <tommaso.merciai...@bp.renesas.com>
---
v1->v2:
 - Fixed: dsi, du and adv7535 are part of the the R9A09G047E57
   SMARC SoM board then add entries in the rzg3e-smarc-som.dtsi instead
   of using the r9a09g047e57-smarc-du1-adv7535.dtsi.

v2->v3:
 - No changes.

v3->v4:
 - No changes.

 .../boot/dts/renesas/rzg3e-smarc-som.dtsi     | 114 ++++++++++++++++++
 1 file changed, 114 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi 
b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi
index 3b571c096752..fa45e001f706 100644
--- a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi
@@ -33,6 +33,7 @@ aliases {
                ethernet0 = &eth0;
                ethernet1 = &eth1;
                i2c2 = &i2c2;
+               i2c7 = &i2c7;
                mmc0 = &sdhi0;
                mmc2 = &sdhi2;
        };
@@ -71,12 +72,47 @@ reg_vdd0p8v_others: regulator-vdd0p8v-others {
                regulator-always-on;
        };
 
+       reg_1p8v_adv: regulator-1p8v-adv {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-1.8V";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       reg_3p3v_adv: regulator-3p3v-adv {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-3.3V";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       osc1: cec-clock {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <12000000>;
+       };
+
        /* 32.768kHz crystal */
        x3: x3-clock {
                compatible = "fixed-clock";
                #clock-cells = <0>;
                clock-frequency = <32768>;
        };
+
+       dsi-to-hdmi-out {
+               compatible = "hdmi-connector";
+               type = "d";
+
+               port {
+                       dsi_to_hdmi_out: endpoint {
+                               remote-endpoint = <&adv7535_out>;
+                       };
+               };
+       };
 };
 
 &audio_extal_clk {
@@ -101,6 +137,37 @@ &eth1 {
        status = "okay";
 };
 
+&dsi {
+       status = "okay";
+
+       ports {
+               port@1 {
+                       dsi_in1: endpoint {
+                               remote-endpoint = <&du1_out_dsi0>;
+                       };
+               };
+
+               port@2 {
+                       dsi_out: endpoint {
+                               remote-endpoint = <&adv7535_in>;
+                               data-lanes = <1 2 3 4>;
+                       };
+               };
+       };
+};
+
+&du1 {
+       status = "okay";
+
+       ports {
+               port@0 {
+                       du1_out_dsi0: endpoint {
+                               remote-endpoint = <&dsi_in1>;
+                       };
+               };
+       };
+};
+
 &gpu {
        status = "okay";
        mali-supply = <&reg_vdd0p8v_others>;
@@ -126,6 +193,48 @@ raa215300: pmic@12 {
        };
 };
 
+&i2c7 {
+       pinctrl-0 = <&i2c7_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+       clock-frequency = <400000>;
+
+       adv7535: hdmi@3d {
+               compatible = "adi,adv7535";
+               reg = <0x3d>, <0x4d>, <0x2d>, <0x5d>;
+               reg-names = "main", "edid", "cec", "packet";
+               clocks = <&osc1>;
+               clock-names = "cec";
+               avdd-supply = <&reg_1p8v_adv>;
+               dvdd-supply = <&reg_1p8v_adv>;
+               pvdd-supply = <&reg_1p8v_adv>;
+               a2vdd-supply = <&reg_1p8v_adv>;
+               v3p3-supply = <&reg_3p3v_adv>;
+               v1p2-supply = <&reg_1p8v_adv>;
+               adi,dsi-lanes = <4>;
+               interrupts-extended = <&pinctrl RZG3E_GPIO(L, 4) 
IRQ_TYPE_EDGE_FALLING>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                               adv7535_in: endpoint {
+                                       remote-endpoint = <&dsi_out>;
+                               };
+                       };
+
+                       port@1 {
+                               reg = <1>;
+                               adv7535_out: endpoint {
+                                       remote-endpoint = <&dsi_to_hdmi_out>;
+                               };
+                       };
+               };
+       };
+};
+
 &i3c {
        pinctrl-0 = <&i3c_pins>;
        pinctrl-names = "default";
@@ -231,6 +340,11 @@ i2c2_pins: i2c {
                         <RZG3E_PORT_PINMUX(3, 5, 1)>; /* SDA2 */
        };
 
+       i2c7_pins: i2c7 {
+               pinmux = <RZG3E_PORT_PINMUX(A, 4, 4)>, /* SCL7 */
+                        <RZG3E_PORT_PINMUX(A, 5, 4)>; /* SDA7 */
+       };
+
        i3c_pins: i3c {
                pinmux = <RZG3E_PORT_PINMUX(2, 0, 2)>, /* I3C0_SCL */
                         <RZG3E_PORT_PINMUX(2, 1, 2)>; /* I3C0_SDA */
-- 
2.43.0