On Thu, 2026-03-12 at 10:30 +0530, Animesh Manna wrote: > As per DP specification, > The DP Source device may optionally enable PR optimization > with DP tunneling. The device shall query the Tunneling Bridge’s > PR tunneling optimization capability by way of the > Panel_Replay_Tunneling_Optimization_Support bit in the > DP_TUNNELING_CAPABILITIES register (DPCD E000Dh[6]), and then > enable PR > only when the Tunneling Bridge is capable. > > Therefore, do not enable Panel Replay for DP tunneling when > optimization > support is not available. > > Suggested-by: Jouni Högander <[email protected]> > Signed-off-by: Animesh Manna <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_psr.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c > b/drivers/gpu/drm/i915/display/intel_psr.c > index 632527ede29f..3ec407a801b1 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -1796,6 +1796,13 @@ static bool > _panel_replay_compute_config(struct intel_crtc_state *crtc_state, > crtc_state->link_off_after_as_sdp_when_pr_active = > compute_link_off_after_as_sdp_when_pr_active(connector); > crtc_state->disable_as_sdp_when_pr_active = > compute_disable_as_sdp_when_pr_active(connector); > > + if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp) && > + !intel_dp_tunnel_pr_optimization_supported(intel_dp)) { > + drm_dbg_kms(display->drm, > + "Panel Replay is disabled as DP > tunelling enabled without
typo tunelling vs. tunneling. How about: "Panel Replay is disabled as DP tunnelling PR optimization not supported." ? BR, Jouni Högander > optimization\n"); > + return false; > + } > + > if (!intel_dp_is_edp(intel_dp)) > return true; >
