Extend rzg2l_du_crtc_create() with software index (swindex) and hardware index (hwindex) parameters to support creating CRTCs for multiple DU instances. Use swindex to select the CRTC entry in the device array, hwindex to fetch per-channel MMIO, reset, and clocks. Store hwindex in the CRTC structure for later use.
No functional change for existing platforms the sole caller passes swindex=0, hwindex=0. This is a preparatory step towards supporting the two DU instances available on RZ/G3E. Signed-off-by: Tommaso Merciai <[email protected]> --- v6->v7: - New patch. drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c | 31 +++++++++++-------- drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.h | 5 ++- drivers/gpu/drm/renesas/rz-du/rzg2l_du_kms.c | 2 +- 3 files changed, 23 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c b/drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c index 622044f994e8..3e8b6cca6d57 100644 --- a/drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c +++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c @@ -388,45 +388,50 @@ static struct clk *rzg2l_du_crtc_clk_get(struct device *dev, const char *name, return devm_clk_get(dev, hw_index == 0 ? name : buf); } -int rzg2l_du_crtc_create(struct rzg2l_du_device *rcdu) +int rzg2l_du_crtc_create(struct rzg2l_du_device *rcdu, unsigned int swindex, + unsigned int hwindex) { struct platform_device *pdev = to_platform_device(rcdu->dev); - struct rzg2l_du_crtc *rcrtc = &rcdu->crtcs[0]; + struct rzg2l_du_crtc *rcrtc = &rcdu->crtcs[swindex]; struct drm_crtc *crtc = &rcrtc->crtc; struct drm_plane *primary; int ret; + rcrtc->hw_index = hwindex; + rcrtc->dev = rcdu; + /* I/O resources */ - rcrtc->mmio = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(rcrtc->mmio)) + rcrtc->mmio = devm_platform_ioremap_resource(pdev, hwindex); + if (IS_ERR(rcrtc->mmio)) { + dev_err(rcdu->dev, "failed to map MMIO for DU%u\n", hwindex); return PTR_ERR(rcrtc->mmio); + } - rcrtc->rstc = devm_reset_control_get_optional_shared(rcdu->dev, NULL); + rcrtc->rstc = devm_reset_control_get_optional_shared_by_index(rcdu->dev, hwindex); if (IS_ERR(rcrtc->rstc)) { - dev_err(rcdu->dev, "can't get cpg reset\n"); + dev_err(rcdu->dev, "can't get cpg reset for DU%u\n", hwindex); return PTR_ERR(rcrtc->rstc); } - rcrtc->rzg2l_clocks.aclk = rzg2l_du_crtc_clk_get(rcdu->dev, "aclk", 0); + rcrtc->rzg2l_clocks.aclk = rzg2l_du_crtc_clk_get(rcdu->dev, "aclk", hwindex); if (IS_ERR(rcrtc->rzg2l_clocks.aclk)) { - dev_err(rcdu->dev, "no axi clock for DU\n"); + dev_err(rcdu->dev, "no axi clock for DU%u\n", hwindex); return PTR_ERR(rcrtc->rzg2l_clocks.aclk); } - rcrtc->rzg2l_clocks.pclk = rzg2l_du_crtc_clk_get(rcdu->dev, "pclk", 0); + rcrtc->rzg2l_clocks.pclk = rzg2l_du_crtc_clk_get(rcdu->dev, "pclk", hwindex); if (IS_ERR(rcrtc->rzg2l_clocks.pclk)) { - dev_err(rcdu->dev, "no peripheral clock for DU\n"); + dev_err(rcdu->dev, "no peripheral clock for DU%u\n", hwindex); return PTR_ERR(rcrtc->rzg2l_clocks.pclk); } - rcrtc->rzg2l_clocks.dclk = rzg2l_du_crtc_clk_get(rcdu->dev, "vclk", 0); + rcrtc->rzg2l_clocks.dclk = rzg2l_du_crtc_clk_get(rcdu->dev, "vclk", hwindex); if (IS_ERR(rcrtc->rzg2l_clocks.dclk)) { - dev_err(rcdu->dev, "no video clock for DU\n"); + dev_err(rcdu->dev, "no video clock for DU%u\n", hwindex); return PTR_ERR(rcrtc->rzg2l_clocks.dclk); } init_waitqueue_head(&rcrtc->flip_wait); - rcrtc->dev = rcdu; primary = rzg2l_du_vsp_get_drm_plane(rcrtc, rcrtc->vsp_pipe); if (IS_ERR(primary)) diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.h b/drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.h index 9b2deb3c589a..1c4f82a1a701 100644 --- a/drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.h +++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.h @@ -30,6 +30,7 @@ struct rzg2l_du_format_info; * @crtc: base DRM CRTC * @dev: the DU device * @mmio: base address of the DU hardware registers for this CRTC + * @hw_index: hardware DU index * @initialized: whether the CRTC has been initialized and clocks enabled * @vblank_enable: whether vblank events are enabled on this CRTC * @event: event to post when the pending page flip completes @@ -44,6 +45,7 @@ struct rzg2l_du_crtc { struct rzg2l_du_device *dev; void __iomem *mmio; + unsigned int hw_index; bool initialized; bool vblank_enable; @@ -84,7 +86,8 @@ static inline struct rzg2l_du_crtc_state *to_rzg2l_crtc_state(struct drm_crtc_st return container_of(s, struct rzg2l_du_crtc_state, state); } -int rzg2l_du_crtc_create(struct rzg2l_du_device *rcdu); +int rzg2l_du_crtc_create(struct rzg2l_du_device *rcdu, unsigned int swindex, + unsigned int hwindex); void rzg2l_du_crtc_finish_page_flip(struct rzg2l_du_crtc *rcrtc); diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_du_kms.c b/drivers/gpu/drm/renesas/rz-du/rzg2l_du_kms.c index 87f171145a23..7cbdf146788e 100644 --- a/drivers/gpu/drm/renesas/rz-du/rzg2l_du_kms.c +++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_du_kms.c @@ -440,7 +440,7 @@ int rzg2l_du_modeset_init(struct rzg2l_du_device *rcdu) return ret; /* Create the CRTCs. */ - ret = rzg2l_du_crtc_create(rcdu); + ret = rzg2l_du_crtc_create(rcdu, 0, 0); if (ret < 0) return ret; -- 2.54.0
