From: Lad Prabhakar <[email protected]> Update the DU CRTC initialisation to request the reset control using devm_reset_control_get_optional_shared(). On RZ/T2H SoCs the DU block does not expose a reset line, and treating the reset as mandatory prevents the driver from probing on those platforms.
Signed-off-by: Lad Prabhakar <[email protected]> Reviewed-by: Laurent Pinchart <[email protected]> --- v1->v2: - Added Reviewed-by tag from Laurent Pinchart. --- drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c b/drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c index 26b95153ce88..48065f4952a3 100644 --- a/drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c +++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c @@ -380,7 +380,7 @@ int rzg2l_du_crtc_create(struct rzg2l_du_device *rcdu) struct drm_plane *primary; int ret; - rcrtc->rstc = devm_reset_control_get_shared(rcdu->dev, NULL); + rcrtc->rstc = devm_reset_control_get_optional_shared(rcdu->dev, NULL); if (IS_ERR(rcrtc->rstc)) { dev_err(rcdu->dev, "can't get cpg reset\n"); return PTR_ERR(rcrtc->rstc); -- 2.54.0
