From: Leonardo Costa <[email protected]>

Add a device tree overlay for the Toradex DSI to LVDS Adapter with the
Toradex Capacitive Touch Display 10.1" LVDS V2. The adapter connects to the
Verdin DSI_1 interface. It is based on the Texas Instruments SN65DSI84
DSI-to-LVDS bridge and drives an Opto Logic SCX1001511GGC49 10.1" WXGA TFT
LCD LVDS panel. Touch input is provided by an ILITEK ILI251x capacitive
touch controller.

Link: 
https://developer.toradex.com/hardware/accessories/add-ons/dsi-lvds-adapter
Link: 
https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-101inch-lvds
Signed-off-by: Leonardo Costa <[email protected]>
---
 arch/arm64/boot/dts/ti/Makefile               |   5 +
 ...dsi-to-lvds-v2-panel-cap-touch-10inch.dtso | 143 ++++++++++++++++++
 2 files changed, 148 insertions(+)
 create mode 100644 
arch/arm64/boot/dts/ti/k3-am625-verdin-dsi-to-lvds-v2-panel-cap-touch-10inch.dtso

diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
index 61ae9039e561d..8b90fef11cb32 100644
--- a/arch/arm64/boot/dts/ti/Makefile
+++ b/arch/arm64/boot/dts/ti/Makefile
@@ -34,6 +34,7 @@ dtb-$(CONFIG_ARCH_K3) += 
k3-am625-verdin-dev-mezzanine-panel-cap-touch-10inch-lv
 dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dev-nau8822-btl.dtbo
 dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dsi-to-hdmi.dtbo
 dtb-$(CONFIG_ARCH_K3) += 
k3-am625-verdin-dsi-to-lvds-panel-cap-touch-10inch.dtbo
+dtb-$(CONFIG_ARCH_K3) += 
k3-am625-verdin-dsi-to-lvds-v2-panel-cap-touch-10inch.dtbo
 dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dahlia-dsi-to-hdmi.dtb
 dtb-$(CONFIG_ARCH_K3) += 
k3-am625-verdin-nonwifi-dahlia-panel-cap-touch-10inch-dsi.dtb
 dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dahlia.dtb
@@ -231,6 +232,9 @@ k3-am625-sk-hdmi-audio-dtbs := k3-am625-sk.dtb 
k3-am62x-sk-hdmi-audio.dtbo
 k3-am625-verdin-wifi-dev-dsi-to-lvds-panel-cap-touch-10inch-dtbs := \
        k3-am625-verdin-wifi-dev.dtb \
        k3-am625-verdin-dsi-to-lvds-panel-cap-touch-10inch.dtbo
+k3-am625-verdin-wifi-dev-dsi-to-lvds-v2-panel-cap-touch-10inch-dtbs := \
+       k3-am625-verdin-wifi-dev.dtb \
+       k3-am625-verdin-dsi-to-lvds-v2-panel-cap-touch-10inch.dtbo
 k3-am625-verdin-wifi-dev-mezzanine-can-dtbs := k3-am625-verdin-wifi-dev.dtb \
        k3-am625-verdin-dev-mezzanine-can.dtbo
 k3-am625-verdin-wifi-dev-mezzanine-panel-cap-touch-10inch-lvds-dtbs := \
@@ -355,6 +359,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
        k3-am625-sk-csi2-tevi-ov5640.dtb \
        k3-am625-sk-hdmi-audio.dtb \
        k3-am625-verdin-wifi-dev-dsi-to-lvds-panel-cap-touch-10inch.dtb \
+       k3-am625-verdin-wifi-dev-dsi-to-lvds-v2-panel-cap-touch-10inch.dtb \
        k3-am625-verdin-wifi-dev-mezzanine-can.dtb \
        k3-am625-verdin-wifi-dev-mezzanine-panel-cap-touch-10inch-lvds.dtb \
        k3-am625-verdin-wifi-dev-nau8822-btl.dtb \
diff --git 
a/arch/arm64/boot/dts/ti/k3-am625-verdin-dsi-to-lvds-v2-panel-cap-touch-10inch.dtso
 
b/arch/arm64/boot/dts/ti/k3-am625-verdin-dsi-to-lvds-v2-panel-cap-touch-10inch.dtso
new file mode 100644
index 0000000000000..dba0b6b9f02db
--- /dev/null
+++ 
b/arch/arm64/boot/dts/ti/k3-am625-verdin-dsi-to-lvds-v2-panel-cap-touch-10inch.dtso
@@ -0,0 +1,143 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright (c) Toradex
+ *
+ * Toradex DSI to LVDS Adapter on Verdin DSI_1 with Capacitive Touch Display 
10.1"
+ * Used on Dahlia (X17) and Development Board (X48) that expose DSI_1 via an
+ * Samtec LSS-130 connector.
+ *
+ * 
https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-101inch-lvds
+ * https://www.toradex.com/accessories/capacitive-touch-display-10.1-inch-lvds
+ * https://developer.toradex.com/hardware/accessories/add-ons/dsi-lvds-adapter
+ * https://www.toradex.com/accessories/verdin-dsi-to-lvds-adapter
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/pwm/pwm.h>
+
+&{/} {
+       backlight_pwm3: backlight-pwm3 {
+               compatible = "pwm-backlight";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_i2s_2_d_out_gpio>;
+               brightness-levels = <0 45 63 88 119 158 203 255>;
+               default-brightness-level = <4>;
+               /* Verdin I2S_2_D_OUT as GPIO (SODIMM 46) */
+               enable-gpios = <&main_gpio0 34 GPIO_ACTIVE_HIGH>;
+               power-supply = <&reg_3v3>;
+               /* Verdin PWM_3_DSI (SODIMM 19) */
+               pwms = <&epwm1 0 6666667 0>;
+       };
+
+       panel-lvds-bridge {
+               compatible = "optologic,scx1001511ggc49", "panel-lvds";
+               backlight = <&backlight_pwm3>;
+               data-mapping = "vesa-24";
+               height-mm = <136>;
+               width-mm = <217>;
+
+               /*
+                * The timings here are different from the nominal ones for the
+                * SCX1001511GGC49 display. They are adjusted to ensure that
+                * the Horizontal Front Porch is long enough for the Verdin
+                * AM62 DPI->DSI bridge (Toshiba TC358768) to enter/exit LP
+                * mode. This is required for the display pipeline to work
+                * correctly.
+                */
+               panel-timing {
+                       clock-frequency = <69500000>;
+                       hactive = <1280>;
+                       hback-porch = <20>;
+                       hfront-porch = <100>;
+                       hsync-len = <24>;
+                       vactive = <800>;
+                       vback-porch = <5>;
+                       vfront-porch = <5>;
+                       vsync-len = <3>;
+                       de-active = <1>;
+                       hsync-active = <0>;
+                       vsync-active = <0>;
+                       pixelclk-active = <0>;
+               };
+
+               port {
+                       panel_lvds_bridge_in: endpoint {
+                               remote-endpoint = <&dsi_lvds_bridge_out>;
+                       };
+               };
+       };
+};
+
+&dsi_bridge {
+       status = "okay";
+};
+
+&dsi_bridge_ports {
+       #address-cells = <1>;
+       #size-cells = <0>;
+
+       port@1 {
+               reg = <1>;
+
+               dsi_bridge_out: endpoint {
+                       remote-endpoint = <&dsi_lvds_bridge_in>;
+               };
+       };
+};
+
+&dss {
+       status = "okay";
+};
+
+/* Verdin I2C_1 */
+&main_i2c1 {
+       #address-cells = <1>;
+       #size-cells = <0>;
+
+       bridge@2c {
+               compatible = "ti,sn65dsi84";
+               reg = <0x2c>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_dsi1_bkl_en>;
+               /* Verdin GPIO_10_DSI (SODIMM 21) - DSI_1_BKL_EN */
+               enable-gpios = <&main_gpio0 30 GPIO_ACTIVE_HIGH>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+
+                               dsi_lvds_bridge_in: endpoint {
+                                       remote-endpoint = <&dsi_bridge_out>;
+                                       data-lanes = <1 2 3 4>;
+                               };
+                       };
+
+                       port@2 {
+                               reg = <2>;
+
+                               dsi_lvds_bridge_out: endpoint {
+                                       remote-endpoint = 
<&panel_lvds_bridge_in>;
+                               };
+                       };
+               };
+       };
+
+       touchscreen@41 {
+               compatible = "ilitek,ili251x";
+               reg = <0x41>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_dsi1_int>, <&pinctrl_i2s_2_bclk_gpio>;
+               /* Verdin GPIO_9_DSI (SODIMM 17) - TOUCH_INT# */
+               interrupt-parent = <&main_gpio1>;
+               interrupts = <49 IRQ_TYPE_EDGE_RISING>;
+               /* Verdin I2S_2_BCLK (SODIMM 42) - TOUCH_RESET# */
+               reset-gpios = <&main_gpio0 35 GPIO_ACTIVE_LOW>;
+       };
+};

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