[PATCH v6 06/13] drm/bridge: it6505: avoid division by zero in pixel clock calculation

[Daniel Golle]

it6505_calc_video_info() checks the sum of the three pixel clock
counter samples for zero before dividing it by 3, so sums of 1 or 2
truncate to 0 and the following pixel clock calculation divides by
zero. Divide first and check the result.

Fixes: b5c84a9edcd4 ("drm/bridge: add it6505 driver")
Signed-off-by: Daniel Golle <dan...@makrotopia.org>
---
v6: no changes

v5: new patch

 drivers/gpu/drm/bridge/ite-it6505.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/bridge/ite-it6505.c 
b/drivers/gpu/drm/bridge/ite-it6505.c
index 3806b0b96637..b7eb746c8f8e 100644
--- a/drivers/gpu/drm/bridge/ite-it6505.c
+++ b/drivers/gpu/drm/bridge/ite-it6505.c
@@ -751,12 +751,13 @@ static void it6505_calc_video_info(struct it6505 *it6505)
                sum += rddata;
        }
 
+       sum /= 3;
+
        if (sum == 0) {
                DRM_DEV_DEBUG_DRIVER(dev, "calc video timing error");
                return;
        }
 
-       sum /= 3;
        pclk = 13500 * 2048 / sum;
        it6505->video_info.clock = pclk;
        it6505->video_info.hdisplay = hdew;
-- 
2.55.0