Hi Biju,
Thanks for your patch.
On Wed, Jul 29, 2026 at 01:54:56PM +0100, Biju wrote:
> From: Biju Das <[email protected]>
>
> Move rzg2l_mipi_dsi_global_timings and its array size out of the hardcoded
> ARRAY_SIZE reference in rzg2l_mipi_dsi_dphy_init() and into the struct
> rzg2l_mipi_dsi_hw_info. This allows future hardware variants to supply
> their own timing tables rather than sharing a single global array, making
> the driver more extensible without code duplication.
>
> Signed-off-by: Biju Das <[email protected]>
> ---
> v1->v2:
> * No change.
> ---
> drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c | 10 ++++++++--
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
> b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
> index 1538eeece2b5..180384c10264 100644
> --- a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
> +++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
> @@ -54,6 +54,8 @@ struct rzg2l_mipi_dsi_hw_info {
> const u8 *table;
> const u8 table_size;
> } cpg_plldsi;
> + const struct rzg2l_mipi_dsi_timings *dsi_global_timings;
> + unsigned int num_dsi_global_timings;
> u32 phy_reg_offset;
> u32 link_reg_offset;
> u32 dphyctrl0_init_val;
> @@ -488,8 +490,8 @@ static int rzg2l_mipi_dsi_dphy_init(struct rzg2l_mipi_dsi
> *dsi,
> u32 dphytim3;
>
> /* All DSI global operation timings are set with recommended setting */
> - for (i = 0; i < ARRAY_SIZE(rzg2l_mipi_dsi_global_timings); ++i) {
> - dphy_timings = &rzg2l_mipi_dsi_global_timings[i];
> + for (i = 0; i < dsi->info->num_dsi_global_timings; ++i) {
> + dphy_timings = &dsi->info->dsi_global_timings[i];
> if (hsfreq <= dphy_timings->hsfreq_max)
> break;
> }
> @@ -1519,6 +1521,8 @@ static const struct rzg2l_mipi_dsi_hw_info
> rzv2h_mipi_dsi_info = {
> .cpg_plldsi.limits = rzv2h_plldsi_limits,
> .cpg_plldsi.table = rzv2h_cpg_div_table,
> .cpg_plldsi.table_size = ARRAY_SIZE(rzv2h_cpg_div_table),
> + .dsi_global_timings = rzg2l_mipi_dsi_global_timings,
> + .num_dsi_global_timings = ARRAY_SIZE(rzg2l_mipi_dsi_global_timings),
Are we sure that rzv2h use these new entries:
.dsi_global_timings = rzg2l_mipi_dsi_global_timings,
.num_dsi_global_timings = ARRAY_SIZE(rzg2l_mipi_dsi_global_timings),
?
Kind regards,
Tommaso
> .phy_reg_offset = 0x10000,
> .link_reg_offset = 0,
> .min_dclk = 5440,
> @@ -1530,6 +1534,8 @@ static const struct rzg2l_mipi_dsi_hw_info
> rzg2l_mipi_dsi_info = {
> .dphy_init = rzg2l_mipi_dsi_dphy_init,
> .dphy_exit = rzg2l_mipi_dsi_dphy_exit,
> .dphy_conf_clks = rzg2l_dphy_conf_clks,
> + .dsi_global_timings = rzg2l_mipi_dsi_global_timings,
> + .num_dsi_global_timings = ARRAY_SIZE(rzg2l_mipi_dsi_global_timings),
> .link_reg_offset = 0x10000,
> .dphyctrl0_init_val = DSIDPHYCTRL0_CAL_EN_HSRX_OFS |
> DSIDPHYCTRL0_CMN_MASTER_EN |
> DSIDPHYCTRL0_RE_VDD_DETVCCQLV18 |
> DSIDPHYCTRL0_EN_BGR,
> --
> 2.43.0
>
