The loongson crtc reset hook performs both atomic state initialization
using __drm_atomic_helper_crtc_reset() and hardware-level register
writes to reset the CRTC.

The hardware reset is not related to atomic state initialization, and
the reset hook is being converted to atomic_create_state which only
deals with state allocation. Move the hardware reset to the CRTC
creation path instead.

Signed-off-by: Maxime Ripard <[email protected]>
---
Cc: Huacai Chen <[email protected]>
Cc: Icenowy Zheng <[email protected]>
Cc: Jianmin Lv <[email protected]>
Cc: Mingcong Bai <[email protected]>
Cc: Qianhai Wu <[email protected]>
Cc: Xi Ruoyao <[email protected]>
---
 drivers/gpu/drm/loongson/lsdc_crtc.c | 15 ++++++++++-----
 1 file changed, 10 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/loongson/lsdc_crtc.c 
b/drivers/gpu/drm/loongson/lsdc_crtc.c
index 16b8f36a4071..7cca574e3b6a 100644
--- a/drivers/gpu/drm/loongson/lsdc_crtc.c
+++ b/drivers/gpu/drm/loongson/lsdc_crtc.c
@@ -388,12 +388,10 @@ static const struct lsdc_crtc_hw_ops 
ls7a2000_crtc_hw_ops[2] = {
        },
 };
 
 static void lsdc_crtc_reset(struct drm_crtc *crtc)
 {
-       struct lsdc_crtc *lcrtc = to_lsdc_crtc(crtc);
-       const struct lsdc_crtc_hw_ops *ops = lcrtc->hw_ops;
        struct lsdc_crtc_state *priv_crtc_state;
 
        if (crtc->state)
                crtc->funcs->atomic_destroy_state(crtc, crtc->state);
 
@@ -401,13 +399,10 @@ static void lsdc_crtc_reset(struct drm_crtc *crtc)
 
        if (!priv_crtc_state)
                __drm_atomic_helper_crtc_reset(crtc, NULL);
        else
                __drm_atomic_helper_crtc_reset(crtc, &priv_crtc_state->base);
-
-       /* Reset the CRTC hardware, this is required for S3 support */
-       ops->reset(lcrtc);
 }
 
 static void lsdc_crtc_atomic_destroy_state(struct drm_crtc *crtc,
                                           struct drm_crtc_state *state)
 {
@@ -935,18 +930,28 @@ static bool lsdc_crtc_get_scanout_position(struct 
drm_crtc *crtc,
                *etime = ktime_get();
 
        return true;
 }
 
+static void lsdc_crtc_hw_reset(struct drm_crtc *crtc)
+{
+       struct lsdc_crtc *lcrtc = to_lsdc_crtc(crtc);
+
+       /* Reset the CRTC hardware, this is required for S3 support */
+       if (lcrtc->hw_ops->reset)
+               lcrtc->hw_ops->reset(lcrtc);
+}
+
 static const struct drm_crtc_helper_funcs lsdc_crtc_helper_funcs = {
        .mode_valid = lsdc_crtc_mode_valid,
        .mode_set_nofb = lsdc_crtc_mode_set_nofb,
        .atomic_enable = lsdc_crtc_atomic_enable,
        .atomic_disable = lsdc_crtc_atomic_disable,
        .atomic_check = lsdc_crtc_helper_atomic_check,
        .atomic_flush = lsdc_crtc_atomic_flush,
        .get_scanout_position = lsdc_crtc_get_scanout_position,
+       .hw_reset = lsdc_crtc_hw_reset,
 };
 
 int ls7a1000_crtc_init(struct drm_device *ddev,
                       struct drm_crtc *crtc,
                       struct drm_plane *primary,

-- 
2.55.0

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