Sorry for the delay, this one slipped through the cracks. Reviewed-by: Lyude Paul <[email protected]>
Will push to drm-misc-next in a moment On Mon, 2026-08-10 at 22:42 +0100, Muhammed Sariyildiz wrote: > MASK(w) expands as ((1 << (w)) - 1), and > GPC2CLK_OUT_SDIV14_INDIV4_MODE > is defined as plain 1. Both are used, via GPC2CLK_OUT_INIT_MASK and > GPC2CLK_OUT_INIT_VAL in gk20a_clk_prog() (and reused by gm20b, which > includes gk20a.h), to compute: > > 1 << 31 > > Left-shifting a signed int into its sign bit is undefined behaviour > per the C standard (ISO C11 6.5.7p4), and is flagged by UBSan and > static analysis tools such as cppcheck (shiftTooManyBitsSigned). Make > the shifted operand unsigned to fix it, matching the pattern used > elsewhere in the kernel for register bitfield masks. > > No functional change intended. > > Found via static analysis (cppcheck --enable=portability) while > auditing nvkm/subdev/clk for correctness issues. > > Signed-off-by: Muhammed Sariyildiz <[email protected]> > --- > drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.h | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.h > b/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.h > index ea5b0ba..7a93f9f 100644 > --- a/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.h > +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.h > @@ -27,7 +27,7 @@ > #define KHZ (1000) > #define MHZ (KHZ * 1000) > > -#define MASK(w) ((1 << (w)) - 1) > +#define MASK(w) ((1U << (w)) - 1) > > #define GK20A_CLK_GPC_MDIV 1000 > > @@ -79,7 +79,7 @@ > #define GPC2CLK_OUT (SYS_GPCPLL_CFG_BASE + > 0x250) > #define GPC2CLK_OUT_SDIV14_INDIV4_WIDTH 1 > #define GPC2CLK_OUT_SDIV14_INDIV4_SHIFT 31 > -#define GPC2CLK_OUT_SDIV14_INDIV4_MODE 1 > +#define GPC2CLK_OUT_SDIV14_INDIV4_MODE 1U > #define GPC2CLK_OUT_VCODIV_WIDTH 6 > #define GPC2CLK_OUT_VCODIV_SHIFT 8 > #define GPC2CLK_OUT_VCODIV1 0
