Thank you for your contribution! Sashiko AI review found 1 potential issue(s) 
to consider:
- [High] drm/tve200: IRQ storm / state machine corruption from level-triggered 
IRQ
--

commit c7049bfa3bb673960be589c51d1114e71aa6a360
Author: Linus Walleij <[email protected]>

ARM: dts: gemini: Use a level-high interrupt for TVE200

TVE200's interrupt is configured as rising-edge. On the D-Link DIR-685,
this can stop interrupt delivery after the first vertical interrupt,
causing vblank and page-flip timeouts and delaying framebuffer console
startup. The vertical interrupt can remain pending after acknowledgment. Use
level-high triggering so the pending condition is delivered again without
requiring another edge.

> diff --git a/arch/arm/boot/dts/gemini/gemini.dtsi 
> b/arch/arm/boot/dts/gemini/gemini.dtsi
> index 23e68e17ffbbd..d8f64fea0a79d 100644
> --- a/arch/arm/boot/dts/gemini/gemini.dtsi
> +++ b/arch/arm/boot/dts/gemini/gemini.dtsi
> @@ -445,7 +445,7 @@ dma-controller@67000000 {
>               display-controller@6a000000 {
>                       compatible = "cortina,gemini-tvc", "faraday,tve200";
>                       reg = <0x6a000000 0x1000>;
> -                     interrupts = <13 IRQ_TYPE_EDGE_RISING>;
> +                     interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;

[Severity: High]
Does configuring this as a level-high interrupt break the driver's state
machine logic in tve200_irq()?

The driver assumes each interrupt corresponds to an exact hardware event and
blindly toggles the TVE200_CTRL trigger condition between VSYNC and VAI:

drivers/gpu/drm/tve200/tve200_display.c:tve200_irq() {
    ...
                /* We have an actual start of vsync */
                if (!(val & TVE200_VSTSTYPE_BITS)) {
                        drm_crtc_handle_vblank(&priv->pipe.crtc);
                        /* Toggle trigger to start of active image */
                        val |= TVE200_VSTSTYPE_VAI;
                } else {
                        /* Toggle trigger back to start of vsync */
                        val &= ~TVE200_VSTSTYPE_BITS;
                }
    ...
}

If the hardware delays deasserting the interrupt line, the level-high
configuration causes the interrupt controller to immediately re-invoke the
handler.

The software state machine then incorrectly interprets this spurious
level-triggered re-fire as the next sequential hardware event, repeatedly
reversing the trigger condition and potentially causing an IRQ storm or
dropped vblank events.

>                       resets = <&syscon GEMINI_RESET_TVC>;
>                       clocks = <&syscon GEMINI_CLK_GATE_TVC>,
>                                <&syscon GEMINI_CLK_TVC>;

-- 
Sashiko AI review ยท 
https://sashiko.dev/#/patchset/[email protected]?part=2

Reply via email to