On Tue, 15 Sep 2026 17:32:14 +0200, Michal Wilczynski wrote:
> The JH7110 groups its display hardware into a video output subsystem,
> dom_vout_top, covering the DC8200, the HDMI transmitter, the video
> output clock generator and the video output system controller.
> 
> They share one NoC port whose clock and reset gate access to every
> register in the region, and the region sits in the PD_VOUT power
> domain. Describe the subsystem as a bus node so those resources are
> owned by the block that shares them, rather than by whichever consumer
> happens to probe first.
> 
> Signed-off-by: Michal Wilczynski <[email protected]>
> ---
>  .../starfive/starfive,jh7110-vout-subsystem.yaml   | 218 
> +++++++++++++++++++++
>  1 file changed, 218 insertions(+)
> 

Reviewed-by: Rob Herring (Arm) <[email protected]>

Reply via email to