The SDP writer currently targets Generic0 for VSC packets. Static HDR
metadata needs a separate slot so that both packets can be sent on the
same stream.

Allow the SDP writer to address a generic packet slot, and define the
Generic2 registers needed for static HDR metadata. Use unaligned
little-endian loads for the payload words and accept a const SDP header.

The existing VSC packet continues to use Generic0 without changing its
layout or enable sequence.

Assisted-by: LLM
Signed-off-by: Xilin Wu <[email protected]>
---
 drivers/gpu/drm/msm/dp/dp_panel.c | 22 ++++++++++------------
 drivers/gpu/drm/msm/dp/dp_reg.h   |  4 ++++
 drivers/gpu/drm/msm/dp/dp_utils.c |  3 ++-
 drivers/gpu/drm/msm/dp/dp_utils.h |  3 ++-
 4 files changed, 18 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/msm/dp/dp_panel.c 
b/drivers/gpu/drm/msm/dp/dp_panel.c
index e76dad0f6663..fdf1a3f437ba 100644
--- a/drivers/gpu/drm/msm/dp/dp_panel.c
+++ b/drivers/gpu/drm/msm/dp/dp_panel.c
@@ -14,6 +14,7 @@
 
 #include <linux/io.h>
 #include <linux/types.h>
+#include <linux/unaligned.h>
 #include <asm/byteorder.h>
 
 #define DP_INTF_CONFIG_DATABUS_WIDEN     BIT(4)
@@ -442,22 +443,19 @@ void msm_dp_panel_clear_dsc_dto(struct msm_dp_panel 
*msm_dp_panel)
        msm_dp_write_p0(panel, MMSS_DP_DSC_DTO, 0x0);
 }
 
-static void msm_dp_panel_send_vsc_sdp(struct msm_dp_panel_private *panel, 
struct dp_sdp *vsc_sdp)
+static void msm_dp_panel_send_sdp(struct msm_dp_panel_private *panel,
+                                 const struct dp_sdp *sdp, u32 base)
 {
        u32 header[2];
-       u32 val;
        int i;
 
-       msm_dp_utils_pack_sdp_header(&vsc_sdp->sdp_header, header);
+       msm_dp_utils_pack_sdp_header(&sdp->sdp_header, header);
+       msm_dp_write_link(panel, base, header[0]);
+       msm_dp_write_link(panel, base + 4, header[1]);
 
-       msm_dp_write_link(panel, MMSS_DP_GENERIC0_0, header[0]);
-       msm_dp_write_link(panel, MMSS_DP_GENERIC0_1, header[1]);
-
-       for (i = 0; i < sizeof(vsc_sdp->db); i += 4) {
-               val = ((vsc_sdp->db[i]) | (vsc_sdp->db[i + 1] << 8) | 
(vsc_sdp->db[i + 2] << 16) |
-                      (vsc_sdp->db[i + 3] << 24));
-               msm_dp_write_link(panel, MMSS_DP_GENERIC0_2 + i, val);
-       }
+       for (i = 0; i < sizeof(sdp->db); i += 4)
+               msm_dp_write_link(panel, base + 8 + i,
+                                 get_unaligned_le32(&sdp->db[i]));
 }
 
 static void msm_dp_panel_update_sdp(struct msm_dp_panel_private *panel)
@@ -487,7 +485,7 @@ void msm_dp_panel_enable_vsc_sdp(struct msm_dp_panel 
*msm_dp_panel, struct dp_sd
        cfg2 |= GENERIC0_SDPSIZE_VALID;
        msm_dp_write_link(panel, MMSS_DP_SDP_CFG2, cfg2);
 
-       msm_dp_panel_send_vsc_sdp(panel, vsc_sdp);
+       msm_dp_panel_send_sdp(panel, vsc_sdp, MMSS_DP_GENERIC0_0);
 
        /* indicates presence of VSC (BIT(6) of MISC1) */
        misc |= DP_MISC1_VSC_SDP;
diff --git a/drivers/gpu/drm/msm/dp/dp_reg.h b/drivers/gpu/drm/msm/dp/dp_reg.h
index dda4b642c81b..6767a215b662 100644
--- a/drivers/gpu/drm/msm/dp/dp_reg.h
+++ b/drivers/gpu/drm/msm/dp/dp_reg.h
@@ -232,10 +232,12 @@
 #define MMSS_DP_AUDIO_CTRL_RESET               (0x00000214)
 
 #define MMSS_DP_SDP_CFG                                (0x00000228)
+#define GEN2_SDP_EN                            BIT(19)
 #define GEN0_SDP_EN                            (0x00020000)
 #define MMSS_DP_SDP_CFG2                       (0x0000022C)
 #define MMSS_DP_AUDIO_TIMESTAMP_0              (0x00000230)
 #define MMSS_DP_AUDIO_TIMESTAMP_1              (0x00000234)
+#define GENERIC2_SDPSIZE_VALID                 BIT(20)
 #define GENERIC0_SDPSIZE_VALID                 (0x00010000)
 
 #define MMSS_DP_AUDIO_STREAM_0                 (0x00000240)
@@ -291,6 +293,8 @@
 #define MMSS_DP_GENERIC1_8                     (0x00000348)
 #define MMSS_DP_GENERIC1_9                     (0x0000034C)
 
+#define MMSS_DP_GENERIC2_0                     (0x000003D8)
+
 #define MMSS_DP_VSCEXT_0                       (0x000002D0)
 #define MMSS_DP_VSCEXT_1                       (0x000002D4)
 #define MMSS_DP_VSCEXT_2                       (0x000002D8)
diff --git a/drivers/gpu/drm/msm/dp/dp_utils.c 
b/drivers/gpu/drm/msm/dp/dp_utils.c
index 4a5ebb0c33b8..226b370ce8fe 100644
--- a/drivers/gpu/drm/msm/dp/dp_utils.c
+++ b/drivers/gpu/drm/msm/dp/dp_utils.c
@@ -74,7 +74,8 @@ u8 msm_dp_utils_calculate_parity(u32 data)
        return parity_byte;
 }
 
-void msm_dp_utils_pack_sdp_header(struct dp_sdp_header *sdp_header, u32 
header_buff[2])
+void msm_dp_utils_pack_sdp_header(const struct dp_sdp_header *sdp_header,
+                                 u32 header_buff[2])
 {
        header_buff[0] = FIELD_PREP(HEADER_0_MASK, sdp_header->HB0) |
                FIELD_PREP(PARITY_0_MASK, 
msm_dp_utils_calculate_parity(sdp_header->HB0)) |
diff --git a/drivers/gpu/drm/msm/dp/dp_utils.h 
b/drivers/gpu/drm/msm/dp/dp_utils.h
index 2e4f98a863c4..2fdb89efc57c 100644
--- a/drivers/gpu/drm/msm/dp/dp_utils.h
+++ b/drivers/gpu/drm/msm/dp/dp_utils.h
@@ -31,6 +31,7 @@
 u8 msm_dp_utils_get_g0_value(u8 data);
 u8 msm_dp_utils_get_g1_value(u8 data);
 u8 msm_dp_utils_calculate_parity(u32 data);
-void msm_dp_utils_pack_sdp_header(struct dp_sdp_header *sdp_header, u32 
header_buff[2]);
+void msm_dp_utils_pack_sdp_header(const struct dp_sdp_header *sdp_header,
+                                 u32 header_buff[2]);
 
 #endif /* _DP_UTILS_H_ */

-- 
2.55.0

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