On Wed, Sep 30, 2026 at 08:41:54PM +0800, Xilin Wu wrote: > Expose the DP Colorspace property and carry VSC packets in bridge atomic > state. Validate VSC support against cached sink capabilities and check it > again after powering up the sink. Regenerate the packet if link training > changes the SDR bit depth.
This doesn't sound nice either. Do you know how it gets handled by i915? > Signal full-range RGB, matching the existing pixel path, and retain CTA > range for YUV420. Reject BT2020_RGB with a YUV420-only mode. Clear stale > MSA colorimetry bits and include VSC removal in peripheral flush requests. This sounds like too many features for a single commit, sorry. > > Force a modeset when colorspace changes. Disable PSR in the controller and > sink while colorimetry VSC packets are active, since they cannot share the > automatic PSR packet generator. Restore PSR configuration when returning > to a stream that does not need colorimetry VSC packets. > > Assisted-by: LLM > Signed-off-by: Xilin Wu <[email protected]> > --- > drivers/gpu/drm/msm/dp/dp_ctrl.c | 33 ++++++++++++++++------ > drivers/gpu/drm/msm/dp/dp_ctrl.h | 2 +- > drivers/gpu/drm/msm/dp/dp_display.c | 26 +++++++++++++++-- > drivers/gpu/drm/msm/dp/dp_drm.c | 13 +++++++-- > drivers/gpu/drm/msm/dp/dp_drm.h | 3 ++ > drivers/gpu/drm/msm/dp/dp_panel.c | 56 > +++++-------------------------------- > drivers/gpu/drm/msm/dp/dp_panel.h | 4 +++ > drivers/gpu/drm/msm/dp/dp_utils.c | 38 +++++++++++++++++++++++++ > drivers/gpu/drm/msm/dp/dp_utils.h | 7 +++++ > 9 files changed, 118 insertions(+), 64 deletions(-) > -- With best wishes Dmitry
