dpu_encoder_virt_atomic_disable() disables the physical encoders in phys_encs[] order, i.e. the master first. With a split display (two interfaces on one CTL, e.g. bonded DSI) the master's dpu_encoder_helper_phys_cleanup() then resets the shared CTL while the slave's timing engine is still running, and the source pipe is left stalled half-way through the slave's next frame.
A power collapse of the MDSS core GDSC clears the stall, so it normally goes unnoticed. When MDSS stays powered across the disable (a full modeset, or an active DP controller), the next enable scans out nothing: black screen with the backlight on. Disable the slave before the master, as atomic_enable() enables them in that order. The slave's cleanup still resets the CTL while the master is running, but the last reset, from the master's cleanup, now happens with both timing engines stopped. Tested on a Lenovo Legion Tab Y700 gen 5 (SM8850, bonded DSI video-mode panel) with MDSS kept active: echo on > /sys/bus/platform/devices/9800000.display-subsystem/power/control DPMS off/on: black 10/10 before, picture 10/10 after. Full modesets were not retested with this version. Only tested on this device. Suggested-by: Dmitry Baryshkov <[email protected]> Fixes: 22cb02bc96ff ("drm/msm/disp/dpu: reset the datapath after timing engine disable") Assisted-by: LLM Signed-off-by: Joonhoe Kim <[email protected]> --- Changes in v3: - Disable the slave before the master instead of stopping the slave timing engines in a helper; drop the comment. Subject updated. [Dmitry] - Link to v2: https://lore.kernel.org/all/[email protected]/ Changes in v2: - Stop only the slave interfaces up front. Subject updated. [sashiko-bot] - Link to v1: https://lore.kernel.org/all/[email protected]/ drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 1f20695f81e3..0a6be69a3e83 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -1386,7 +1386,6 @@ static void dpu_encoder_virt_atomic_disable(struct drm_encoder *drm_enc, struct dpu_encoder_virt *dpu_enc = NULL; struct drm_crtc *crtc; struct drm_crtc_state *old_state = NULL; - int i = 0; dpu_enc = to_dpu_encoder_virt(drm_enc); DPU_DEBUG_ENC(dpu_enc, "\n"); @@ -1412,12 +1411,11 @@ static void dpu_encoder_virt_atomic_disable(struct drm_encoder *drm_enc, dpu_encoder_resource_control(drm_enc, DPU_ENC_RC_EVENT_PRE_STOP); - for (i = 0; i < dpu_enc->num_phys_encs; i++) { - struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; + if (dpu_enc->cur_slave && dpu_enc->cur_slave->ops.disable) + dpu_enc->cur_slave->ops.disable(dpu_enc->cur_slave); - if (phys->ops.disable) - phys->ops.disable(phys); - } + if (dpu_enc->cur_master && dpu_enc->cur_master->ops.disable) + dpu_enc->cur_master->ops.disable(dpu_enc->cur_master); /* after phys waits for frame-done, should be no more frames pending */ base-commit: 6375e61c01e93e35ee7acd336a689ac1fae4b509 -- 2.43.0
