Applied.  Thanks!

On Wed, Oct 14, 2026 at 8:56 AM Avi Weiss <[email protected]> wrote:
>
> navi10_force_clk_levels() and sienna_cichlid_force_clk_levels()
> return success when a DPM frequency lookup or soft frequency range
> update fails. smu_force_smuclk_levels() then records the requested
> clock mask even though the operation failed.
>
> Return the helper error from both callbacks instead to improve
> observability. No obvious reason to clobber the return values here.
>
> Fixes: db439ca21b81f ("drm/amd/powerplay: add function force_clk_levels for 
> navi10")
> Fixes: b455159c05313 ("drm/amdgpu/powerplay: add initial swSMU support for 
> sienna_cichlid (v2)")
> Signed-off-by: Avi Weiss <[email protected]>
> ---
>  drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c         | 6 +++---
>  drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 2 +-
>  2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c 
> b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> index f8ca5eb9adc6..2d05088619f6 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> @@ -1439,15 +1439,15 @@ static int navi10_force_clk_levels(struct smu_context 
> *smu,
>
>                 ret = smu_v11_0_get_dpm_freq_by_index(smu, clk_type, 
> soft_min_level, &min_freq);
>                 if (ret)
> -                       return 0;
> +                       return ret;
>
>                 ret = smu_v11_0_get_dpm_freq_by_index(smu, clk_type, 
> soft_max_level, &max_freq);
>                 if (ret)
> -                       return 0;
> +                       return ret;
>
>                 ret = smu_v11_0_set_soft_freq_limited_range(smu, clk_type, 
> min_freq, max_freq, false);
>                 if (ret)
> -                       return 0;
> +                       return ret;
>                 break;
>         case SMU_DCEFCLK:
>                 dev_info(smu->adev->dev, "Setting DCEFCLK min/max dpm level 
> is not supported!\n");
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c 
> b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> index b42897e7c066..4ef3863fae1a 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> @@ -1460,7 +1460,7 @@ static int sienna_cichlid_force_clk_levels(struct 
> smu_context *smu,
>         }
>
>  forec_level_out:
> -       return 0;
> +       return ret;
>  }
>
>  static int sienna_cichlid_populate_umd_state_clk(struct smu_context *smu)
>
> base-commit: 4056b3c9d3c92ea45955641dbafeb9b960e146ef
> --
> 2.43.0
>

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