Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [Medium] arm64: dts: imx8: missing adma_lcdif and lcd_clk_lpcg deletion on imx8qm --
commit 90895a7ff82b0903e1aaa5301959b704913e49e1 Author: Frank Li <[email protected]> arm64: dts: imx8-ss-dma: Add lcdif support for i.MX8QXP and i.MX8DXL This commit adds the adma_lcdif and lcd_clk_lpcg device tree nodes to imx8-ss-dma.dtsi for i.MX8QXP and overrides the compatible string, clock rates, and interrupt in imx8dxl-ss-adma.dtsi for i.MX8DXL. > diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi > b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi > index 4de78f870c05c..87082c3fa9338 100644 > --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi > @@ -149,6 +149,24 @@ lpuart3: serial@5a090000 { > status = "disabled"; > }; > > + adma_lcdif: lcdif@5a180000 { > + compatible = "fsl,imx8qxp-lcdif", "fsl,imx6sx-lcdif"; > + reg = <0x5a180000 0x10000>; > + clocks = <&lcd_clk_lpcg IMX_LPCG_CLK_0>, > + <&lcd_clk_lpcg IMX_LPCG_CLK_4>, > + <&clk IMX_SC_R_LCD_0 IMX_SC_PM_CLK_MISC0>; > + clock-names = "pix", "axi", "disp_axi"; > + assigned-clocks = <&clk IMX_SC_R_LCD_0 IMX_SC_PM_CLK_PER>, > + <&clk IMX_SC_R_LCD_0 IMX_SC_PM_CLK_MISC0>, > + <&clk IMX_SC_R_ELCDIF_PLL IMX_SC_PM_CLK_PLL>; > + assigned-clock-parents = <&clk IMX_SC_R_ELCDIF_PLL > IMX_SC_PM_CLK_PLL>, > + <&clk IMX_SC_R_LCD_0 > IMX_SC_PM_CLK_BYPASS>; > + assigned-clock-rates = <0>, <24000000>, <804000000>; > + interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; > + power-domains = <&pd IMX_SC_R_LCD_0>; > + status = "disabled"; > + }; > + > adma_pwm: pwm@5a190000 { > compatible = "fsl,imx8qxp-pwm", "fsl,imx27-pwm"; > reg = <0x5a190000 0x1000>; > @@ -298,6 +316,17 @@ uart3_lpcg: clock-controller@5a490000 { > power-domains = <&pd IMX_SC_R_UART_3>; > }; > > + lcd_clk_lpcg: clock-controller@5a580000 { > + compatible = "fsl,imx8qxp-lpcg"; > + reg = <0x5a580000 0x4>; > + #clock-cells = <1>; > + clocks = <&clk IMX_SC_R_LCD_0 IMX_SC_PM_CLK_PER>, > + <&dma_ipg_clk>; > + clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_4>; > + clock-output-names = "lcd_clk_lpcg", "lcd_ipg_clk"; > + power-domains = <&pd IMX_SC_R_LCD_0>; > + }; [Severity: Medium] Should arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi also delete &adma_lcdif and &lcd_clk_lpcg? arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi is included by arch/arm64/boot/dts/freescale/imx8qm.dtsi: #include "imx8-ss-img.dtsi" #include "imx8-ss-dma.dtsi" #include "imx8-ss-conn.dtsi" ... }; #include "imx8qm-ss-img.dtsi" #include "imx8qm-ss-dma.dtsi" i.MX8QM does not have the adma_lcdif peripheral or the IMX_SC_R_LCD_0 and IMX_SC_R_ELCDIF_PLL resources (which are omitted from imx8qm_clk_scu_rsrc_table[] in drivers/clk/imx/clk-imx8qm-rsrc.c). For the companion adma_pwm and adma_pwm_lpcg nodes, arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi explicitly removes them (added in commit e07c4c0a5972 ("arm64: dts: imx8: delete pwm nodes in dma subsys for imx8qm")): /delete-node/ &adma_pwm; /delete-node/ &adma_pwm_lpcg; Without deleting &adma_lcdif and &lcd_clk_lpcg in imx8qm-ss-dma.dtsi, all i.MX8QM and i.MX8QP device trees inherit both nodes, and lcd_clk_lpcg (clock-controller@5a580000) is enabled by default. On i.MX8QM, does this cause U-Boot resource partition ownership warnings and cause Linux probing of 5a580000.clock-controller to fail power domain attachment in imx_scu_add_pm_domain() -> imx_scu_pd_xlate() (-ENOENT) and clock lookup in imx_clk_scu_alloc_dev() -> imx_scu_of_clk_src_get() (-ENODEV) for IMX_SC_R_LCD_0? > + > adma_pwm_lpcg: clock-controller@5a590000 { > compatible = "fsl,imx8qxp-lpcg"; > reg = <0x5a590000 0x10000>; [ ... ] -- Sashiko AI review ยท https://sashiko.dev/#/patchset/[email protected]?part=4
