The SM8450 HDK board can be connected to an external display card, which carries a 1080x2400 LCD panel module powered by the Novatek NT36672E display driver IC with an integrated touchscreen controller.
The panel is connected to DSI0 over a 3-trio MIPI C-PHY link, power is supplied by VREG_L12C_1P8, the bias supplies are on the panel module, and they are enabled by signal PM8350 GPIO8 (LCD_BIAS_EN). The backlight is controlled by the PM8350 GPIO9 (LCD_WLED_EN) signal and the PM8350C LPG PWM on PM8350C GPIO8 (LCD_PWM). As documented in the panel binding, the reset GPIO is described as active high, although the panel reset signal is active low. The DSI0 output is shared with the on-board Lontium LT9611UXC HDMI bridge, thus disable the bridge and its power supplies in the overlay. The touchscreen controller is not described, since there is no binding or driver support for it yet. Signed-off-by: Vladimir Zapolskiy <[email protected]> --- arch/arm64/boot/dts/qcom/Makefile | 4 + .../dts/qcom/sm8450-hdk-display-card.dtso | 144 ++++++++++++++++++ 2 files changed, 148 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sm8450-hdk-display-card.dtso diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 88230c4e00ea..93abf21132c1 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -422,6 +422,10 @@ dtb-$(CONFIG_ARCH_QCOM) += sm8350-microsoft-surface-duo2.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8350-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8350-sony-xperia-sagami-pdx214.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8350-sony-xperia-sagami-pdx215.dtb + +sm8450-hdk-display-card-dtbs := sm8450-hdk.dtb sm8450-hdk-display-card.dtbo + +dtb-$(CONFIG_ARCH_QCOM) += sm8450-hdk-display-card.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8450-hdk.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8450-qrd.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8450-samsung-r0q.dtb diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk-display-card.dtso b/arch/arm64/boot/dts/qcom/sm8450-hdk-display-card.dtso new file mode 100644 index 000000000000..0e7b48b8357a --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sm8450-hdk-display-card.dtso @@ -0,0 +1,144 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Linaro Limited + * Copyright (c) Vladimir Zapolskiy <[email protected]> + */ + +/* + * Display Card kit overlay + * + * S5702 switch 7 should be turned OFF to route DSI0 to the display panel + */ + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/phy/phy.h> +#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> + +/dts-v1/; +/plugin/; + +&{/} { + lcd_backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pm8350c_pwm 3 65535>; + enable-gpios = <&pm8350_gpios 9 GPIO_ACTIVE_HIGH>; + + pinctrl-0 = <&lcd_wled_en>; + pinctrl-names = "default"; + }; +}; + +/* Disable HDMI bridge related nodes (mutually exclusive with the display card) */ + +&i2c9 { + status = "disabled"; +}; + +<9611_1v2 { + status = "disabled"; +}; + +<9611_3v3 { + status = "disabled"; +}; + +<9611_codec { + status = "disabled"; +}; + +&mdss_dsi0 { + #address-cells = <1>; + #size-cells = <0>; + + panel@0 { + compatible = "novatek,nt36672e"; + reg = <0>; + + enable-gpios = <&pm8350_gpios 8 GPIO_ACTIVE_HIGH>; + reset-gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; + + vddi-supply = <&vreg_l12c_1p8>; + + backlight = <&lcd_backlight>; + + pinctrl-0 = <&disp0_reset_n_active>, <&mdp_vsync>, <&lcd_bias_en>; + pinctrl-1 = <&disp0_reset_n_suspend>, <&mdp_vsync>, <&lcd_bias_en>; + pinctrl-names = "default", "sleep"; + + port { + panel0_in: endpoint { + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + }; +}; + +&mdss_dsi0_out { + remote-endpoint = <&panel0_in>; + data-lanes = <0 1 2>; +}; + +&mdss_dsi0_phy { + phy-type = <PHY_TYPE_CPHY>; +}; + +&pm8350_gpios { + lcd_bias_en: lcd-bias-en-state { + pins = "gpio8"; + function = "normal"; + output-low; + bias-disable; + qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>; + power-source = <0>; + }; + + lcd_wled_en: lcd-wled-en-state { + pins = "gpio9"; + function = "normal"; + output-low; + bias-disable; + qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>; + power-source = <0>; + }; +}; + +&pm8350c_gpios { + lcd_pwm: lcd-pwm-state { + pins = "gpio8"; + function = "func1"; + output-low; + bias-disable; + qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>; + power-source = <0>; + }; +}; + +&pm8350c_pwm { + pinctrl-0 = <&lcd_pwm>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&tlmm { + disp0_reset_n_active: disp0-reset-n-active-state { + pins = "gpio0"; + function = "gpio"; + drive-strength = <8>; + bias-disable; + }; + + disp0_reset_n_suspend: disp0-reset-n-suspend-state { + pins = "gpio0"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + mdp_vsync: mdp-vsync-state { + pins = "gpio86"; + function = "mdp_vsync"; + drive-strength = <2>; + bias-pull-down; + }; +}; -- 2.51.0
