[PATCH RFC v2 07/14] iommu: arm-smmu-qcom: Fixed mapping between sid and cb for gpu and lpac

[Anna Maniscalco]

We want to map context bank 0 to SID 0 and context bank 1 to SID 1 as it
makes it simpler to deal with.

Signed-off-by: Anna Maniscalco <anna.maniscalco2...@gmail.com>
---
 drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 31 ++++++++++++++++++++++++------
 1 file changed, 25 insertions(+), 6 deletions(-)

diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c 
b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
index ae6152bddf8f..9413b748e79d 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
@@ -225,6 +225,24 @@ static void qcom_adreno_smmu_set_prr_addr(const void 
*cookie, phys_addr_t page_a
 #define QCOM_ADRENO_SMMU_GPU_SID 0
 #define QCOM_ADRENO_SMMU_LPAC_SID 1
 
+static bool qcom_adreno_smmu_is_lpac_device(struct device *dev)
+{
+       struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
+       int i;
+
+       /*
+        * LPAC will always use SID 1
+        */
+       for (i = 0; i < fwspec->num_ids; i++) {
+               u16 sid = FIELD_GET(ARM_SMMU_SMR_ID, fwspec->ids[i]);
+
+               if (sid == QCOM_ADRENO_SMMU_LPAC_SID)
+                       return true;
+       }
+
+       return false;
+}
+
 static bool qcom_adreno_smmu_is_gpu_device(struct device *dev)
 {
        struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
@@ -237,8 +255,7 @@ static bool qcom_adreno_smmu_is_gpu_device(struct device 
*dev)
        for (i = 0; i < fwspec->num_ids; i++) {
                u16 sid = FIELD_GET(ARM_SMMU_SMR_ID, fwspec->ids[i]);
 
-               if (sid == QCOM_ADRENO_SMMU_GPU_SID ||
-                   sid == QCOM_ADRENO_SMMU_LPAC_SID)
+               if (sid == QCOM_ADRENO_SMMU_GPU_SID)
                        return true;
        }
 
@@ -313,12 +330,14 @@ static int qcom_adreno_smmu_alloc_context_bank(struct 
arm_smmu_domain *smmu_doma
         */
        if (qcom_adreno_smmu_is_gpu_device(dev)) {
                start = 0;
-               count = 2;
+               count = start + 1;
+       } else if (qcom_adreno_smmu_is_lpac_device(dev)) {
+               start = 1;
+               count = start + 1;
        } else {
                start = 2;
                count = smmu->num_context_banks;
        }
-
        return __arm_smmu_alloc_bitmap(smmu->context_map, start, count);
 }
 
@@ -363,8 +382,8 @@ static int qcom_adreno_smmu_init_context(struct 
arm_smmu_domain *smmu_domain,
        if (client_match)
                qcom_smmu_set_actlr_dev(dev, smmu, cbndx, client_match);
 
-       /* Only enable split pagetables for the GPU device (SID 0) */
-       if (!qcom_adreno_smmu_is_gpu_device(dev))
+       /* Only enable split pagetables for the GPU and LPAC devices (SID 0 and 
1) */
+       if (!qcom_adreno_smmu_is_gpu_device(dev) && 
!qcom_adreno_smmu_is_lpac_device(dev))
                return 0;
 
        /*

-- 
2.56.0