On 02/11/2026 15:40, Philipp Stanner wrote:
On Mon, 2026-11-02 at 14:47 +0000, Tvrtko Ursulin wrote:
With FIFO and RR, on amdgpu, SDMA rings, only if more than one, *if*
there exists userspace which does dynamic priority changes (calls
DRM_IOCTL_AMDGPU_SCHED / AMDGPU_SCHED_OP_*_PRIORITY_OVERRIDE) on
entities using those SDMA engines directly. All clear now? :))
Argh, maybe I should not have asked, but since we are here already…
It seems that all this is inconsistent already.
Why do we even have both, priority and rq_priority? Both should always
be identical.
I suppose it is because we're in the "transition to CFS" phase where
you will actually need a per-RQ-priority (rq_priority), later phasing
entity->priority out.
Right?
The opposite - entity->rq_priority goes away when FIFO and RR are
removed and we can (again) consolidate to a single run-queue. Until
then, it is FAIR where priority != rq_priority (because everything is in
the single run queue), and FIFO and RR where priority == rq_priority.
If so, I wonder if we can't leave it be until we are at CFS?
I'd like to get the fixes in so I can mentally focus on the continuation
of the bigger story. Not least that not fixing it causes sashiko to flag
the bugs, either when touching the neighbouring code, or possibly even
just the logical functionality.
Regards,
Tvrtko
