Hello again.
Well, after some tests, it seems that the problem was caused by the FIFO
size. This was one of the differences between running the little module
(ati_mach64gui.o) under or without X (this is because in the 2D driver,
GUI_CNTL is set to zero when pATI->Chip >= ATI_CHIP_264VT4, in order to use
the max possible fifo depth, 192) . Furthermore, I tested that once X has
run, the DMA test in ati_mach64gui didn't work anymore with or without X
(because the FIFO depth was changed before).
So, I was able to simulate the same behaviour clearing GUI_CNTL (exactly the
0 and 1 bits: CMDFIFO_SIZE_MODE, that was set to one by the 2D driver) in the
ati_mach64gui.o. I changed the DRI driver to set the 0 bit in GUI_CNTL (that
is the default value, and, after this, reading GUI_STAT, as is said in the
documentation), and it didn't work. So, I changed some other things in the
DRI driver: set the busmastering in the init function and not in the bm_test
one, removed the call to the dump_engine_info and changed some register
manipulations. After this, the BusMastering test worked and finally:
PAT_REG0=0x22222222 !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
I'm attaching the mach64_dma.c in this mail, so anyone can check it in
another machine.
Well, the next step I want to do will be to rescue the macros
DMAOUTREG/DMAADVANCE and friends from the Utah-GLX code and remove the direct
register writing from the Mesa lib. Then, fire 'gears' and enjoy with the
speed of this old mach64.
--
Manuel Teira
mach64_dma.c.bz2
