Michel Dänzer wrote: > On Don, 2002-09-26 at 18:17, Keith Whitwell wrote: > >>Michel Dänzer wrote: >> >>>Something else I've been thinking about is that relying on the >>>swi_emitted and swi_received counters being in sync is pretty fragile. >>>It might be better to use a scratch register instead. >>> >>Yes, it could be made more robust. >> > > Do you think the approach with a scratch register is good?
Yep, but I guess you have to worry about then going to sleep *after* the interrupt has arrived, if there is a delay in getting the scratch write across the bus, compared to the irq, which should be instantaneous. ... >>We shoudl add diagnostics to the -EBUSY case in wait_irq to try and figure out >>what has happened -- particularly have the interrupts been disabled? >> > > Turns out they haven't. GEN_INT_CNTL looks exactly like it should. > Interestingly, the GEN_INT_STATUS bits are set as well, and > acknowledging them helps. So it seems that somehow, the service routine > didn't get called for an interrupt, or the acknowledgement got lost. > > If the updated patch works for you as well, I'll commit it. The patch doesn't seem to do anything about this case, just print something out... Keith ------------------------------------------------------- This sf.net email is sponsored by:ThinkGeek Welcome to geek heaven. http://thinkgeek.com/sf _______________________________________________ Dri-devel mailing list [EMAIL PROTECTED] https://lists.sourceforge.net/lists/listinfo/dri-devel
