On Tue, 2003-03-04 at 05:19, Philip Brown wrote: > ah. Thanks for the extra info. > [someone might want to comment the thing in the header files] > > Solaris handles it differently. It specifies a particular memory mapping as > needing sequential access, at map time, I believe.
The purpose of this barrier isn not to ensure sequential access on either the MMIO mapping (card registers) nor the actual ring buffer memory mapping (could be IOs, or just real memory with PCI GART). It's here to actually sync those 2 between each other. That is make sure the writes to the ring are completed before the chip is actually kicked. This is a nasty corner case often overlooked in drivers, see a mail I just posted to lkml '[RFC] IO vs. DMA and barriers' Ben. ------------------------------------------------------- This SF.net email is sponsored by: Etnus, makers of TotalView, The debugger for complex code. Debugging C/C++ programs can leave you feeling lost and disoriented. TotalView can help you find your way. Available on major UNIX and Linux platforms. Try it free. www.etnus.com _______________________________________________ Dri-devel mailing list [EMAIL PROTECTED] https://lists.sourceforge.net/lists/listinfo/dri-devel
