I realize replies will be resticted under NDA, but I am unable to refine my questions until I can find the answers to the following questions in relation to ATI docs some developers have access too.
1. Do the ATI docs outline or detail expected PCI access process for the r200 chipset, and if so, how close does the code match to it. 2. Do the docs specify expected process of initializing the card for both AGP and PCI and how close does the code match this. 3. Are all registers mentioned in the docs also in the code. 4. From the published register information (under the NDI) is the detail enough to know if some registers need special handling, and if so, is this being done in the code exactly as detailed in the docs. 5. Is there anything in the documentation in reguards to PCI or anything effecting PCI that is not implemented in the code, and if so, is it possable to implement without breaching the NDA. 6. Is there anything that is not implemented in the code that exists in the docs. If so is the NDA preventing the implementation or has it been a case of time constraints. I think that covers everything I wish to ask at this stage, and incase you are wondering, I am willing to help solve the mystery of the slow pci-gart, and the first place would appear to be comparing the docs to whats in the code and find any difference in implementation no matter how small. But since I don't have access to these docs I need the help of those that do. ------------------------------------------------------- This SF.net email is sponsored by OSDN's Audience Survey. Help shape OSDN's sites and tell us what you think. Take this five minute survey and you could win a $250 Gift Certificate. http://www.wrgsurveys.com/2003/osdntech03.php?site=8 _______________________________________________ Dri-devel mailing list [EMAIL PROTECTED] https://lists.sourceforge.net/lists/listinfo/dri-devel
