On Mon, Feb 16, 2009 at 5:33 PM, Michel Dänzer <[email protected]> wrote: > On Fri, 2009-02-13 at 10:27 -0800, Jesse Barnes wrote: >> On Friday, February 13, 2009 2:33 am Michel Dänzer wrote: >> > On Thu, 2009-02-12 at 09:15 -0800, Jesse Barnes wrote: >> > > It does, but take a look at that code again. If interrupts are disabled >> > > by the timer, we'll capture the frame count. If, sometime later, they're >> > > re-enabled, we'll end up in drm_update_vblank_count. And if, between >> > > those two points, we've had a DPMS event, the frame counter will have >> > > been reset and will now be a lower value, so our drm_update_vblank_count >> > > will detect a wraparound. I think any hardware that resets its frame >> > > count will be susceptible to this problem unless we make wraparounds >> > > harmless. >> > >> > The modeset ioctl makes wraparounds harmless if used correctly. >> >> I don't think it does. And you may not be seeing this problem on radeon >> because your max_vblank_count is only 0x1fffff, which wouldn't trigger this >> behavior. > > Which btw looks like it's incorrect for newer Radeons with AVIVO display > engine, which seem to have 24 bits in the frame counter registers - > Dave/Alex?
Yes 24-bits on r500 and above. Dave. ------------------------------------------------------------------------------ Open Source Business Conference (OSBC), March 24-25, 2009, San Francisco, CA -OSBC tackles the biggest issue in open source: Open Sourcing the Enterprise -Strategies to boost innovation and cut costs with open source participation -Receive a $600 discount off the registration fee with the source code: SFAD http://p.sf.net/sfu/XcvMzF8H -- _______________________________________________ Dri-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/dri-devel
