All, As a part of emancipation I am working on scratch writing a PCI NE2000 driver (ne); I had a general question about efficiently handling DMA on the DP8390 chipsets:
>From the specification, it appears that DMA can be configured as a single 32-bit channel with access to a single 64k ring. I am not sure how this stacks up to other chipsets, but this ring is divided between rx and tx (at the discretion of the driver). So my question is this: Does it make sense to partition the buffer such that enough space is allocated for sending a single packet (i.e. 256 * 6 perhaps) at the end of the ring, and rest used for reception? Send packet commands must be issued in serial, but I am concerned that using a single descriptor could create a bottleneck (even for 10mbps). Would it be better to essentially double buffer transmits using 2 descriptors? Thoughts? -- Yet magic and hierarchy arise from the same source, and this source has a null pointer. Reference the NULL within NULL, it is the gateway to all wizardry. _______________________________________________ driver-discuss mailing list [email protected] http://mail.opensolaris.org/mailman/listinfo/driver-discuss
