According to Documentation/memory-barriers.txt, a memory barrier is put
in place by wait_event_*()
Signed-off-by: Eli Billauer <eli.billa...@gmail.com>
---
drivers/staging/xillybus/xillybus_core.c | 3 ---
1 files changed, 0 insertions(+), 3 deletions(-)
diff --git a/drivers/staging/xillybus/xillybus_core.c
b/drivers/staging/xillybus/xillybus_core.c
index 0214009..93a3c61 100644
--- a/drivers/staging/xillybus/xillybus_core.c
+++ b/drivers/staging/xillybus/xillybus_core.c
@@ -640,7 +640,6 @@ static int xilly_obtain_idt(struct xilly_endpoint *endpoint)
iowrite32(1 |
(3 << 24), /* Opcode 3 for channel 0 = Send IDT */
endpoint->registers + fpga_buf_ctrl_reg);
- mmiowb(); /* Just to appear safe */
wait_event_interruptible_timeout(channel->wr_wait,
(!channel->wr_sleepy),
@@ -1986,7 +1985,6 @@ static int xilly_quiesce(struct xilly_endpoint *endpoint)
wmb(); /* Make sure idtlen is set before sending command */
iowrite32((u32) (endpoint->dma_using_dac & 0x0001),
endpoint->registers + fpga_dma_control_reg);
- mmiowb();
wait_event_interruptible_timeout(endpoint->ep_wait,
(endpoint->idtlen >= 0),
@@ -2055,7 +2053,6 @@ int xillybus_endpoint_discovery(struct xilly_endpoint
*endpoint)
*/
iowrite32((u32) (endpoint->dma_using_dac & 0x0001),
endpoint->registers + fpga_dma_control_reg);
- mmiowb();
wait_event_interruptible_timeout(endpoint->ep_wait,
(endpoint->idtlen >= 0),
--
1.7.2.3
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