Branch: refs/heads/thaines/x86_64_registers Home: https://github.com/dyninst/dyninst Commit: 7916d626f98c5829be528ae43706b517ebda4a2a https://github.com/dyninst/dyninst/commit/7916d626f98c5829be528ae43706b517ebda4a2a Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023)
Changed paths: M common/h/registers/x86_64_regs.h Log Message: ----------- Improve comments for register lengths Commit: a35960d9e7ff495249a8918f455d49d50a5df4d9 https://github.com/dyninst/dyninst/commit/a35960d9e7ff495249a8918f455d49d50a5df4d9 Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/h/registers/x86_64_regs.h M common/src/registers/MachRegister.C Log Message: ----------- Separate MMX/3DNow! and x87 register lengths The MMX* registers are only the lower 64 bits of the st* ones. Commit: 9e77c02bc0801070a3264bbb816d8f3020ed0c41 https://github.com/dyninst/dyninst/commit/9e77c02bc0801070a3264bbb816d8f3020ed0c41 Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/src/registers/MachRegister.C Log Message: ----------- Fix x86_64 subrange mappings in MachRegister::getROSERegister The values in the two namespaces are not the same. Commit: 254e3e70fded3be35cae4c0c668e9a6f7d05cf90 https://github.com/dyninst/dyninst/commit/254e3e70fded3be35cae4c0c668e9a6f7d05cf90 Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/src/registers/MachRegister.C Log Message: ----------- Clean up size calculation in MachRegister Commit: e8d4dc912caf429e1e70a8acf5adf9900f218b5f https://github.com/dyninst/dyninst/commit/e8d4dc912caf429e1e70a8acf5adf9900f218b5f Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/h/registers/x86_64_regs.h M common/src/registers/MachRegister.C Log Message: ----------- Separate MMX/3DNow! and x87 register categories Commit: 452e95fbaced3e89ac0dc35220699209ab96f6b5 https://github.com/dyninst/dyninst/commit/452e95fbaced3e89ac0dc35220699209ab96f6b5 Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/h/registers/x86_64_regs.h Log Message: ----------- Reorder the length flags This puts them in more of a chronological order. Commit: bf5d43a54cd123ad073926285f17306a775944fa https://github.com/dyninst/dyninst/commit/bf5d43a54cd123ad073926285f17306a775944fa Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/h/registers/x86_64_regs.h Log Message: ----------- Improve comments for register categories Commit: 1460cc1279564512dca46c75bca18b8c60e90672 https://github.com/dyninst/dyninst/commit/1460cc1279564512dca46c75bca18b8c60e90672 Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/h/registers/x86_64_regs.h Log Message: ----------- Reorder register categories This puts them in more of a chronological order. Commit: 35d0fe15a65f1d5427c0570604bd1bb31b8c5a74 https://github.com/dyninst/dyninst/commit/35d0fe15a65f1d5427c0570604bd1bb31b8c5a74 Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/h/registers/x86_64_regs.h Log Message: ----------- Move FLAGS ID down with the others. Commit: 7a6f22a66434e2a0baa72acabc581661bbf5e7d7 https://github.com/dyninst/dyninst/commit/7a6f22a66434e2a0baa72acabc581661bbf5e7d7 Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/h/registers/x86_64_regs.h Log Message: ----------- Add comments for aliased GPRs No real comments here. Just added a separator. Commit: 82578c36c0198aec7390e455a49d4ea2fadfb811 https://github.com/dyninst/dyninst/commit/82578c36c0198aec7390e455a49d4ea2fadfb811 Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/h/registers/x86_64_regs.h Log Message: ----------- Improve comments for EFLAGS fields Commit: e79d18fb72076ba0c950de00ef603c32088f37d4 https://github.com/dyninst/dyninst/commit/e79d18fb72076ba0c950de00ef603c32088f37d4 Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/h/registers/x86_64_regs.h Log Message: ----------- Move FLAGS ID Commit: 734a3f41aac85d5bbd3adc9bd98e1b452b466048 https://github.com/dyninst/dyninst/commit/734a3f41aac85d5bbd3adc9bd98e1b452b466048 Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/h/registers/x86_64_regs.h M common/src/registers/MachRegister.C Log Message: ----------- Use symbolic names for the segment register base IDs Commit: 56d20758f10e7db2907604c764da54c91efdf844 https://github.com/dyninst/dyninst/commit/56d20758f10e7db2907604c764da54c91efdf844 Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/h/registers/x86_64_regs.h M common/src/registers/MachRegister.C M dataflowAPI/src/SymEvalPolicy.C Log Message: ----------- Add missing flag1 from RFLAGS Commit: 23d345092cd7c027d20339e788814f6e2dd8aff2 https://github.com/dyninst/dyninst/commit/23d345092cd7c027d20339e788814f6e2dd8aff2 Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/h/registers/x86_64_regs.h M common/src/registers/MachRegister.C M dataflowAPI/src/SymEvalPolicy.C Log Message: ----------- Add missing flag3 from RFLAGS Commit: fdd2d7619de0622b6e3b0f83948af33d27c5ce45 https://github.com/dyninst/dyninst/commit/fdd2d7619de0622b6e3b0f83948af33d27c5ce45 Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/h/registers/x86_64_regs.h M common/src/registers/MachRegister.C M dataflowAPI/src/SymEvalPolicy.C Log Message: ----------- Add missing flag5 from RFLAGS Commit: 53625db42578d6c1b48b96e8b312bcbcb581ad15 https://github.com/dyninst/dyninst/commit/53625db42578d6c1b48b96e8b312bcbcb581ad15 Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/h/registers/x86_64_regs.h M common/src/registers/MachRegister.C M dataflowAPI/src/SymEvalPolicy.C Log Message: ----------- Add missing flagc from RFLAGS FLAGC is the lower bit of the I/O Permission Level field. Commit: 140cae0347eced0065a29348ce7d67b82c0169da https://github.com/dyninst/dyninst/commit/140cae0347eced0065a29348ce7d67b82c0169da Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/h/registers/x86_64_regs.h M common/src/registers/MachRegister.C M dataflowAPI/src/SymEvalPolicy.C Log Message: ----------- Add missing flagd from RFLAGS FLAGC is the upper bit of the I/O Permission Level field. Commit: 9d845fa6f0b382e1b5b4dcbf2808684cebe0e4ce https://github.com/dyninst/dyninst/commit/9d845fa6f0b382e1b5b4dcbf2808684cebe0e4ce Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/h/registers/x86_64_regs.h M common/src/registers/MachRegister.C M dataflowAPI/src/SymEvalPolicy.C Log Message: ----------- Add missing flagf from RFLAGS Commit: d8944e2d514b0e42f110ff769896777faf5fef90 https://github.com/dyninst/dyninst/commit/d8944e2d514b0e42f110ff769896777faf5fef90 Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/h/registers/x86_64_regs.h Log Message: ----------- Improve comments about RFLAGS Commit: ff96bdce929c4e29836524ba3ca3fd6e137a0442 https://github.com/dyninst/dyninst/commit/ff96bdce929c4e29836524ba3ca3fd6e137a0442 Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/h/registers/x86_64_regs.h M common/src/registers/MachRegister.C Log Message: ----------- Add missing Virtual-8086 mode (VM) rFLAGS field Commit: cfa0e7041bfb2f6775e6c1a76976bf451bc613ec https://github.com/dyninst/dyninst/commit/cfa0e7041bfb2f6775e6c1a76976bf451bc613ec Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/src/registers/MachRegister.C Log Message: ----------- Add conversion to ROSE register for Resume Flag Commit: d7f9b6a7f30294da0cfd827f9077d675d9edb5f9 https://github.com/dyninst/dyninst/commit/d7f9b6a7f30294da0cfd827f9077d675d9edb5f9 Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/src/registers/MachRegister.C Log Message: ----------- Add conversion to ROSE register for Nested Task flag Commit: 7cd74c9a3eb68c6a877b8de754e0f4d21aed7e8c https://github.com/dyninst/dyninst/commit/7cd74c9a3eb68c6a877b8de754e0f4d21aed7e8c Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/h/registers/x86_64_regs.h M common/src/registers/MachRegister.C Log Message: ----------- Add missing Alignment Check/Access Control (AC) RFLAGS field Commit: a83e3d2f8ec8b451e1b059247b32942c7dba1e9a https://github.com/dyninst/dyninst/commit/a83e3d2f8ec8b451e1b059247b32942c7dba1e9a Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/h/registers/x86_64_regs.h M common/src/registers/MachRegister.C Log Message: ----------- Add missing Virtual Interrupt Flag (VIF) RFLAGS field Commit: 4152d26dd180a5cbb2359a0b6b3a5e80ac95bbcb https://github.com/dyninst/dyninst/commit/4152d26dd180a5cbb2359a0b6b3a5e80ac95bbcb Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/h/registers/x86_64_regs.h M common/src/registers/MachRegister.C Log Message: ----------- Add missing Virtual Interrupt Pending (VIP) RFLAGS field Commit: 06fb3cbe6ed8d40b97dbeee5377643ff69cfea7a https://github.com/dyninst/dyninst/commit/06fb3cbe6ed8d40b97dbeee5377643ff69cfea7a Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/h/registers/x86_64_regs.h M common/src/registers/MachRegister.C Log Message: ----------- Add missing ID Flag (ID) RFLAGS field Commit: 05c2d658b25ccfdcd9d2b5f2663ccc172ff2147b https://github.com/dyninst/dyninst/commit/05c2d658b25ccfdcd9d2b5f2663ccc172ff2147b Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/h/registers/x86_64_regs.h Log Message: ----------- Improve descriptions in comment about format of constants Commit: a6c698fccfbde7ccd97ec7087a2d71f727e01e72 https://github.com/dyninst/dyninst/commit/a6c698fccfbde7ccd97ec7087a2d71f727e01e72 Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/h/registers/x86_64_regs.h M common/src/registers/MachRegister.C Log Message: ----------- Fix avx-512 opmask size. It's 64 bits, not 128. From Intel(R) 64 and IA-32 Architectures Software Developer’s Manual June 2021 15.6.1 OPMASK Register to Predicate Vector Data Processing The opmask is a set of eight architectural registers of size MAX_KL (64-bit). Commit: 73384025fd8b3a5ba81b8c943b3813465703f46e https://github.com/dyninst/dyninst/commit/73384025fd8b3a5ba81b8c943b3813465703f46e Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/h/registers/x86_64_regs.h M common/src/registers/MachRegister.C Log Message: ----------- Rename OCT to XMMS This makes it consistent with the names used for the other vector extensions. Commit: 235cf2536d0656161d0061d580e48493a0eb790c https://github.com/dyninst/dyninst/commit/235cf2536d0656161d0061d580e48493a0eb790c Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/h/registers/x86_64_regs.h Log Message: ----------- Reorder register declarations It makes it easier to read. Commit: d25ee77a7a032224f96e76ee9e5ad5a8750108b5 https://github.com/dyninst/dyninst/commit/d25ee77a7a032224f96e76ee9e5ad5a8750108b5 Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/h/registers/x86_64_regs.h M common/src/registers/MachRegister.C Log Message: ----------- Add missing subranges in MachRegister::getROSERegister Commit: f0532f30801730cd7a5a122ef1a10f7425af3a6b https://github.com/dyninst/dyninst/commit/f0532f30801730cd7a5a122ef1a10f7425af3a6b Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/src/registers/MachRegister.C Log Message: ----------- Use st0 as base register for MMX Commit: bfa3039f82cb2ac59b620907764ade093ef2f8c4 https://github.com/dyninst/dyninst/commit/bfa3039f82cb2ac59b620907764ade093ef2f8c4 Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/src/registers/MachRegister.C Log Message: ----------- Use ymm0 as base register for SSE Commit: 906c44298bf61431238af937ecb22aaee8741208 https://github.com/dyninst/dyninst/commit/906c44298bf61431238af937ecb22aaee8741208 Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/src/registers/MachRegister.C Log Message: ----------- Use zmm0 as base register for AVX Commit: 2faac59fb44c0d8031395bc91223788d20a56b6e https://github.com/dyninst/dyninst/commit/2faac59fb44c0d8031395bc91223788d20a56b6e Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/h/registers/x86_64_regs.h Log Message: ----------- Fix comment on XMM, YMM, ZMM register numbers Assume AMD64 extensions are in place so that XMM8-XMM15 are present. Commit: 398ad046c1eba7a187e02e062342fb30a5fd7822 https://github.com/dyninst/dyninst/commit/398ad046c1eba7a187e02e062342fb30a5fd7822 Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/src/registers/MachRegister.C Log Message: ----------- Preserve register number in getBaseRegister Commit: 78305c9181faf805ed7c82d21bc427d88487eeef https://github.com/dyninst/dyninst/commit/78305c9181faf805ed7c82d21bc427d88487eeef Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/src/registers/MachRegister.C Log Message: ----------- Clear whole subrange byte for GPRs in getBaseRegister Commit: 18d78f45535cdf03b11aa2fe1ce6ec8ae343d09e https://github.com/dyninst/dyninst/commit/18d78f45535cdf03b11aa2fe1ce6ec8ae343d09e Author: Tim Haines <thaines.as...@gmail.com> Date: 2023-11-21 (Tue, 21 Nov 2023) Changed paths: M common/h/registers/x86_64_regs.h Log Message: ----------- Synchronize values for VM...ID with x86 Compare: https://github.com/dyninst/dyninst/compare/de91da753543...18d78f45535c _______________________________________________ Dyninst-api mailing list Dyninst-api@cs.wisc.edu https://lists.cs.wisc.edu/mailman/listinfo/dyninst-api