On Fri, Feb 19, 2010 at 01:53:01PM -0800, Allan, Bruce W wrote: > Exactly which erratum are you referring to? Erratum 17 in the 82573 > Specification Update? If that is the case, I see the possibility of > another interpretation of the erratum which suggests the possibility > of the same issue on other variants of the 82573 when using standard > frame sizes and ASPM enabled. Not to mention, I believe there may be > other parts (82574 perhaps) that will have issues with L1 ASPM > enabled. I will follow-up with the folks who did the investigation > that resulted in the erratum in order to get a clearer picture of all > this, and take a look into other parts that may likewise be affected.
Ah, yes - I see that it could be interpreted that way. The description seems to suggest that it's only relevant if ERT is enabled, which is required for jumbo frames. I'm not entirely clear on whether ERT is enabled in other circumstances? If not, we ought to be able to limit this to the L device - if not, it should be done on E and V as well. The 82574 specification update doesn't mention any ASPM errata, but if you're able to check then that would be great. My main aim here is to try to get it turned back on on hardware where this works, since it's a measurable power saving. -- Matthew Garrett | [email protected] ------------------------------------------------------------------------------ Download Intel® Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev _______________________________________________ E1000-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/e1000-devel To learn more about Intel® Ethernet, visit http://communities.intel.com/community/wired
