On Wed, Dec 5, 2012 at 3:05 PM, Jeff Kirsher
<[email protected]> wrote:
> On Wed, 2012-12-05 at 13:57 -0700, Bjorn Helgaas wrote:
>> Use the standard #defines for PCIe Capability ASPM fields.
>>
>> Previously we used PCIE_LINK_STATE_L0S and PCIE_LINK_STATE_L1
>> directly, but
>> these are defined for the Linux ASPM interfaces, e.g.,
>> pci_disable_link_state(), and only coincidentally match the actual
>> register
>> bits.  PCIE_LINK_STATE_CLKPM, also part of that interface, does not
>> match
>> the register bit.
>>
>> Signed-off-by: Bjorn Helgaas <[email protected]>
>> CC: Jeff Kirsher <[email protected]>
>> CC: Jesse Brandeburg <[email protected]>
>> CC: Bruce Allan <[email protected]>
>> CC: Carolyn Wyborny <[email protected]>
>> CC: Don Skidmore <[email protected]>
>> CC: Greg Rose <[email protected]>
>> CC: Peter P Waskiewicz Jr <[email protected]>
>> CC: Alex Duyck <[email protected]>
>> CC: John Ronciak <[email protected]>
>> CC: [email protected]
>> ---
>>  drivers/net/ethernet/intel/e1000e/netdev.c |   11 +++++++++--
>>  1 files changed, 9 insertions(+), 2 deletions(-)
>
> Thanks I will add this patch to my queue for e1000e.  Since this is
> patch 7 of 12, are there PCI dependent patches in the series that need
> to be applied before?

Yes.  It does depend on a previous patch that adds the #defines to
include/uapi/linux/pci_regs.h
(http://marc.info/?l=linux-pci&m=135474107109010&w=2).

I plan to merge that during the v3.8 merge window, so you can merge it
after that.  Or, if it won't cause you conflicts, I can include the
e1000e change in my PCI tree.

Bjorn

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