On 09/12/2013 06:55 AM, nirmoy das wrote: > Hey, > > I am trying to write my own driver for intel 82599. After enabling 63 VF > using pci_enable_sriov(), How rx/tx queue distribution happen amoung PF and > VF? > > Is PF is using first pool of queues like in 16 Mode PF gets 0-7 queues? >
The PF pool always starts at the end of the VF pools. So if you have 63 VFs they will consume queues 0 - 125. That leaves queues 126 and 127 for the PF if I recall correctly. Thanks, Alex ------------------------------------------------------------------------------ How ServiceNow helps IT people transform IT departments: 1. Consolidate legacy IT systems to a single system of record for IT 2. Standardize and globalize service processes across IT 3. Implement zero-touch automation to replace manual, redundant tasks http://pubads.g.doubleclick.net/gampad/clk?id=51271111&iu=/4140/ostg.clktrk _______________________________________________ E1000-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/e1000-devel To learn more about Intel® Ethernet, visit http://communities.intel.com/community/wired
