Sure. From the following.
"
VLAN Filter. Each bit ‘i’ in register ‘n’ affects packets with VLAN
tags equal to 32*n+i.
128 VLAN Filter registers compose a table of 4096 bits that cover all
possible VLAN
tags.
Each bit when set, enables packets with the associated VLAN tags to
pass. Each bit
when cleared, blocks packets with this VLAN tag.
"
Your suggestions seems reasonable. Please wait. I will make tests to
vefiry your suggestions.
I will keep you update.
On Wed, Nov 16, 2016 at 10:05 PM, Lino Sanfilippo <linosanfili...@gmx.de> wrote:
>
>
> Hi,
>
>>
>> Sometimes vfta registers can not be written successfully in dcb mode.
>> This is very occassional. When the ixgbe nic runs for a very long time,
>> sometimes this bug occurs. But after IXGBE_WRITE_FLUSH is executed,
>> this bug never occurs.
>>
>> Signed-off-by: Zhu Yanjun <zyjzyj2...@gmail.com>
>> ---
>> drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 5 ++++-
>> 1 file changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
>> b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
>> index bd93d82..1221cfb 100644
>> --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
>> +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
>> @@ -4138,8 +4138,10 @@ static void ixgbe_vlan_promisc_enable(struct
>> ixgbe_adapter *adapter)
>> }
>>
>> /* Set all bits in the VLAN filter table array */
>> - for (i = hw->mac.vft_size; i--;)
>> + for (i = hw->mac.vft_size; i--;) {
>> IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
>> + IXGBE_WRITE_FLUSH(hw);
>> + }
>
> Should it not be sufficient to do the flush only once, at the end of the
> function?
>
> Regards,
> Lino
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