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--- Comment #17 from John Dallaway <[email protected]> 2011-03-16 17:33:50 GMT --- (In reply to comment #15) > (In reply to comment #14) > > Samsung S3C45xx ARM7 parts have cache. Or did you mean no Atmel ARM7 > > parts have cache? > > Ah ok, that changes things then. This is meant to be a generic ARM7 HAL. The > initial focus is on AT91, but it's definitely not meant to be an AT91 ARM7 > HAL. > > In that case that complicates things. We need to construct the ARM7 variant > hal_cache.h in such a way that a processor HAL (e.g. S3C45xx) can override all > the settings. > > There are numerous other examples of this in other HALs. The general idea is > that the hal_cache.h #includes a <cyg/hal/proc_cache.h> or similar, before it > defines anything itself. Yes, this seems like the right approach where _most_ ARM7 processors have no cache. Something like: #ifdef CYGBLD_HAL_ARM_PROC_CACHE_H #include <cyg/hal/proc_cache.h> #endif #ifndef HAL_DCACHE_ENABLE #define HAL_DCACHE_ENABLE() #endif etc... -- Configure bugmail: http://bugs.ecos.sourceware.org/userprefs.cgi?tab=email ------- You are receiving this mail because: ------- You are on the CC list for the bug.
