Thanks Laszlo, If there is some confusion in SDM, we could inform SDM owner to make a update.
Thanks! Jeff -----Original Message----- From: Laszlo Ersek [mailto:[email protected]] Sent: Friday, October 16, 2015 2:25 AM To: Fan, Jeff; [email protected] Cc: Kinney, Michael D; Paolo Bonzini Subject: Re: [edk2] [PATCH v3 03/52] UefiCpuPkg: PiSmmCpuDxeSmm: do not execute RSM from 64-bit mode On 10/15/15 03:31, Fan, Jeff wrote: > Ersek & Bonzini, > > From SDM 34.5.2, SMI Handler Operating Mode Switching. > "Any required change to operating mode is performed by the RSM > instruction; there is no need for the SMI handler to change modes explicitly > prior to executing RSM." I believe Paolo based the statement "According to Intel this is invalid" on another location in the Intel SDM. So maybe there's a contradiction in the SDM somewhere -- I don't know the exact place Paolo may have had in mind. Either way, if you guys can agree on the correct interpretation, we can certainly drop this patch. Thanks! Laszlo > So, I don't think we need to go back to 32-bit PM before RSM. > > Thanks! > Jeff > -----Original Message----- > From: edk2-devel [mailto:[email protected]] On Behalf Of > Laszlo Ersek > Sent: Thursday, October 15, 2015 6:26 AM > To: [email protected] > Cc: Kinney, Michael D > Subject: [edk2] [PATCH v3 03/52] UefiCpuPkg: PiSmmCpuDxeSmm: do not > execute RSM from 64-bit mode > > From: Paolo Bonzini <[email protected]> > > According to Intel this is invalid. Go back to 32-bit protected mode and > clear EFER.LME before executing RSM. > > Cc: Michael Kinney <[email protected]> > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Paolo Bonzini <[email protected]> > --- > > Notes: > v3: > - New in v3, but included only for completeness here. This is a > correction from Paolo for Mike's series "[edk2] [PATCH 0/7] > UefiCpuPkg: Add CPU SMM and SecCore". > > UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.S | 13 +++++++++++++ > UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm | 13 +++++++++++++ > UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.S | 13 +++++++++++++ > UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.asm | 13 +++++++++++++ > 4 files changed, 52 insertions(+) > > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.S > b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.S > index 8315593..0f1cab6 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.S > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.S > @@ -212,6 +212,19 @@ L1: > .byte 0x48, 0x89, 0x0d # mov [rip + disp32], rcx > .long SSM_DR6 - (. + 4 - _SmiEntryPoint + 0x8000) > L2: > + > + pushq $PROTECT_MODE_CS > + pushq $L3 > + lretq > +L3: > + movq %cr0, %rbx > + btrl $31, %ebx > + movq %rbx, %cr0 > + movl $0xc0000080, %ecx > + rdmsr > + andb $0xfe,%ah > + wrmsr > + > rsm > > ASM_PFX(gcSmiHandlerSize): .word . - _SmiEntryPoint > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm > b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm > index a1a7d3e..99eb403 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm > @@ -214,6 +214,19 @@ _SmiHandler: > DB 48h, 89h, 0dh ; mov [rip + disp32], rcx > DD SSM_DR6 - ($ + 4 - _SmiEntryPoint + 8000h) > @2: > + > + push PROTECT_MODE_CS > + push @3 > + retfq > +@3: > + mov rbx, cr0 > + btr ebx, 31 > + mov cr0, rbx > + mov ecx, 0c0000080h > + rdmsr > + and ah, 0feh > + wrmsr > + > rsm > > gcSmiHandlerSize DW $ - _SmiEntryPoint > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.S > b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.S > index 5ace1a6..fc7c2f9 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.S > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.S > @@ -32,6 +32,7 @@ ASM_GLOBAL ASM_PFX(mSmmRelocationOriginalAddressPtr32) > ASM_GLOBAL ASM_PFX(gSmmInitStack) > ASM_GLOBAL ASM_PFX(gcSmiInitGdtr) > > +.equ PROTECT_MODE_CS, 0x08 > > .text > > @@ -89,6 +90,18 @@ ASM_PFX(gSmmInitStack): .space 8 > movdqa 0x40(%rsp), %xmm4 > movdqa 0x50(%rsp), %xmm5 > > + pushq $PROTECT_MODE_CS # push 32-bit CS > + pushq $L3 > + lretq > +L3: > + movq %cr0, %rbx # get out of long mode > + btrl $31, %ebx > + movq %rbx, %cr0 > + movl $0xc0000080, %ecx > + rdmsr > + andb $0xfe,%ah > + wrmsr > + > rsm > > ASM_PFX(gcSmmInitTemplate): > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.asm > b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.asm > index 25a0447..68540a6 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.asm > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.asm > @@ -32,6 +32,8 @@ EXTERNDEF mSmmRelocationOriginalAddressPtr32:DWORD > EXTERNDEF gSmmInitStack:QWORD > EXTERNDEF gcSmiInitGdtr:FWORD > > +PROTECT_MODE_CS EQU 08h > + > .code > > gcSmiInitGdtr LABEL FWORD > @@ -88,6 +90,17 @@ gSmmInitStack DQ ? > movdqa xmm4, [rsp + 40h] > movdqa xmm5, [rsp + 50h] > > + push PROTECT_MODE_CS > + push @3 > + retfq > +@3: > + mov rbx, cr0 > + btr ebx, 31 > + mov cr0, rbx > + mov ecx, 0c0000080h > + rdmsr > + and ah, 0feh > + wrmsr > rsm > SmmStartup ENDP > > -- > 1.8.3.1 > > > _______________________________________________ > edk2-devel mailing list > [email protected] > https://lists.01.org/mailman/listinfo/edk2-devel > _______________________________________________ edk2-devel mailing list [email protected] https://lists.01.org/mailman/listinfo/edk2-devel
