The stride used by the cache maintenance by MVA instructions should be retrieved from CTR_EL0.DminLine and CTR_EL0.IminLine, whose values reflect the actual geometry of the caches. Using CCSIDR for this purpose violates the architecture.
Also, move the line length accessors to common code, since there is no need to keep them separate between ARMv7 and AArch64. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <[email protected]> Reviewed-by: Mark Rutland <[email protected]> --- ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c | 25 ------------------ ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c | 27 -------------------- ArmPkg/Library/ArmLib/Common/ArmLib.c | 18 +++++++++++++ 3 files changed, 18 insertions(+), 52 deletions(-) diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c index 4bea20356fa3..dec125f248cd 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c @@ -21,31 +21,6 @@ #include "AArch64Lib.h" #include "ArmLibPrivate.h" -UINTN -EFIAPI -ArmDataCacheLineLength ( - VOID - ) -{ - UINT32 CCSIDR = ReadCCSIDR (0) & 7; - - // * 4 converts to bytes - return (1 << (CCSIDR + 2)) * 4; -} - -UINTN -EFIAPI -ArmInstructionCacheLineLength ( - VOID - ) -{ - UINT32 CCSIDR = ReadCCSIDR (1) & 7; - - // * 4 converts to bytes - return (1 << (CCSIDR + 2)) * 4; -} - - VOID AArch64DataCacheOperation ( IN AARCH64_CACHE_OPERATION DataCacheOperation diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c index 44edff869eae..b53f455bfad2 100644 --- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c +++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c @@ -20,33 +20,6 @@ #include "ArmV7Lib.h" #include "ArmLibPrivate.h" -UINTN -EFIAPI -ArmDataCacheLineLength ( - VOID - ) -{ - UINT32 CCSIDR = ReadCCSIDR (0) & 7; - - // * 4 converts to bytes - return (1 << (CCSIDR + 2)) * 4; -} - -UINTN -EFIAPI -ArmInstructionCacheLineLength ( - VOID - ) -{ - UINT32 CCSIDR = ReadCCSIDR (1) & 7; - - // * 4 converts to bytes - return (1 << (CCSIDR + 2)) * 4; - -// return 64; -} - - VOID ArmV7DataCacheOperation ( IN ARM_V7_CACHE_OPERATION DataCacheOperation diff --git a/ArmPkg/Library/ArmLib/Common/ArmLib.c b/ArmPkg/Library/ArmLib/Common/ArmLib.c index 4febc45220a3..ad0a265e9f59 100644 --- a/ArmPkg/Library/ArmLib/Common/ArmLib.c +++ b/ArmPkg/Library/ArmLib/Common/ArmLib.c @@ -70,3 +70,21 @@ ArmUnsetCpuActlrBit ( Value &= ~Bits; ArmWriteCpuActlr (Value); } + +UINTN +EFIAPI +ArmDataCacheLineLength ( + VOID + ) +{ + return 4 << ((ArmCacheInfo () >> 16) & 0xf); // CTR_EL0.DminLine +} + +UINTN +EFIAPI +ArmInstructionCacheLineLength ( + VOID + ) +{ + return 4 << (ArmCacheInfo () & 0xf); // CTR_EL0.IminLine +} -- 1.9.1 _______________________________________________ edk2-devel mailing list [email protected] https://lists.01.org/mailman/listinfo/edk2-devel
