Add a function to ArmLib that provides access to the Cache Writeback
Granularity (CWG) field in CTR_EL0. This information is required when
performing non-coherent DMA.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <[email protected]>
---
 ArmPkg/Include/Library/ArmLib.h       |  6 ++++++
 ArmPkg/Library/ArmLib/Common/ArmLib.c | 17 +++++++++++++++++
 2 files changed, 23 insertions(+)

diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h
index 2059a67bbf3c..6a52006b504e 100644
--- a/ArmPkg/Include/Library/ArmLib.h
+++ b/ArmPkg/Include/Library/ArmLib.h
@@ -116,6 +116,12 @@ ArmInstructionCacheLineLength (
 
 UINTN
 EFIAPI
+ArmCacheWritebackGranularity (
+  VOID
+  );
+
+UINTN
+EFIAPI
 ArmIsArchTimerImplemented (
   VOID
   );
diff --git a/ArmPkg/Library/ArmLib/Common/ArmLib.c 
b/ArmPkg/Library/ArmLib/Common/ArmLib.c
index ad0a265e9f59..0de323a30ff1 100644
--- a/ArmPkg/Library/ArmLib/Common/ArmLib.c
+++ b/ArmPkg/Library/ArmLib/Common/ArmLib.c
@@ -88,3 +88,20 @@ ArmInstructionCacheLineLength (
 {
   return 4 << (ArmCacheInfo () & 0xf); // CTR_EL0.IminLine
 }
+
+UINTN
+EFIAPI
+ArmCacheWritebackGranularity (
+  VOID
+  )
+{
+  UINTN   CWG;
+
+  CWG = (ArmCacheInfo () >> 24) & 0xf; // CTR_EL0.CWG
+
+  if (CWG == 0) {
+    return SIZE_512KB;
+  }
+
+  return 4 << CWG;
+}
-- 
1.9.1

_______________________________________________
edk2-devel mailing list
[email protected]
https://lists.01.org/mailman/listinfo/edk2-devel

Reply via email to