Yesterday's 3-piece series is now a 7-piece series, since I spotted some other
issues when looking at this code.
Patch #1 replaces the bogus TTBR_WRITE_THROUGH_NO_ALLOC with something that is
more aligned with what TTBRx actually allows.
Patch #2 adds an accessor to the ID_MMFR0 system id register.
Patch #3 adds a test for the presence of the multiprocessing extensions.
Patch #4 adds the shareable bit to the TTBR config to ensure that page table
accesses to cached memory are shareable.
Patch #5 adds a feature flag PCD that removes the shareable attribute from all
cached mappings.
Patch #6 fixes the definition of TTBR_NON_INNER_CACHEABLE, whose name and
value are inconsistent and incorrect, respectively
Patch #7 changes the TTBR memory attributes on systems without the
multiprocessing extensions.
Ard Biesheuvel (7):
ArmPkg/ArmV7Mmu: fix write-through translation table accesses
ArmPkg/ArmV7Lib: add support for reading the ID_MMFR0 system register
ArmPkg/ArmV7Lib: add function to test for presence of MP extensions
ArmPkg/ArmV7Mmu: make cached translation table accesses shareable
ArmPkg/ArmV7Mmu: introduce feature PCD to map normal memory
non-shareable
ArmPkg/ArmV7Lib: fix definition of TTBR_NON_INNER_CACHEABLE
ArmPkg/ArmV7Lib: take MP extensions into account when programming TTBR
ArmPkg/ArmPkg.dec | 6 ++++
ArmPkg/Include/Chipset/ArmV7Mmu.h | 15 ++++++----
ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.S | 7 +++++
ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.asm | 7 +++++
ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.h | 12 ++++++++
ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf | 3 ++
ArmPkg/Library/ArmLib/ArmV7/ArmV7LibPrePi.inf | 3 ++
ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c | 31 ++++++++++++++++++--
ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S | 5 ++++
ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm | 5 ++++
10 files changed, 86 insertions(+), 8 deletions(-)
--
1.9.1
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