On 20/04/16 14:34, Graeme Gregory wrote:
On Tue, Apr 19, 2016 at 04:11:54PM +0100, Sudeep Holla wrote:
XPress-RICH3 PCIe driver initialises the root complex with the same
source and target address for IO window which makes translate offset 0.

This patch fixes the translate offset for the IO window in Juno PCIe
root complex ACPI table.

Contributed-under: TianoCore Contribution Agreement 1.0
Cc: Ard Biesheuvel <[email protected]>
Cc: Leif Lindholm <[email protected]>
Signed-off-by: Sudeep Holla <[email protected]>
---
  Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl 
b/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl
index 800d2cb3b2fb..ab5041db731a 100644
--- a/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl
+++ b/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl
@@ -109,7 +109,7 @@ DefinitionBlock("SsdtPci.aml", "SSDT", 1, "ARMLTD", 
"ARM-JUNO", EFI_ACPI_ARM_OEM
                                        0x00000000,                             
                        // Granularity
                                        0x5f800000,                             
                        // Min Base Address
                                        0x5fffffff,                             
                        // Max Base Address
-                                       0x5f800000,                             
                        // Translate
+                                       0x00000000,                             
                        // Translate
                                        0x00800000                              
                        // Length
                                )
                        }) // Name(RBUF)

I suspect the correct form here is

0x00000000, // Granularity
0x00000000, // Min Base Address
0x00ffffff, // Max Base Address
0x5f800000, // Translate
0x00800000, // Length

In my understanding Min/Max are in terms of the IO ports and translation
address is where in physical memory that set of IO ports is mapped.


Yes that makes sense. I recall now that I wanted to check what you are suggesting above after reading some private discussion on this. I never got around that and totally forgot.

I will give it a try. Thanks for reminding me.

--
Regards,
Sudeep
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