Also, if that comment was correct, why would the code directly check for a
pagetable:
} else if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(FirstLevelTable[i])) {
I think maybe the comment was out of date.
K2
-----Original Message-----
From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org]
Sent: Wednesday, September 21, 2016 10:21 AM
To: Kurt Kennett <kurt.kenn...@microsoft.com>
Cc: edk2-devel <edk2-devel@lists.01.org>
Subject: Re: [edk2] Problem with Arm Mmu code in CpuDxe
On 21 September 2016 at 17:09, Kurt Kennett <kurt.kenn...@microsoft.com> wrote:
> I am having a problem on my system (assert), and during investigation I may
> have found a problem with the Arm CpuDxe Mmu code that may affect all ARM
> platform users.
>
> CpuDxeInitialize is the entry point, and pretty soon after entry it does:
>
> SyncCacheConfig (&mCpu);
>
> This calls into:
> ArmPkg\Drivers\CpuDxe\Arm\Mmu.c
>
> The code asserts that the Mmu is enabled, gets the memory space map, then
> starts to process the page tables by getting the TTBR0 base address.
Before the assert, there is a comment that says
// This code assumes MMU is enabled and filed [sic] with section translations
I don't know if this is a reasonable thing to assume, and how you end up
violating this assumption, but it does explain why the code does not work
correctly.
What does your memory map look like?
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