On Fri, Oct 06, 2017 at 09:51:17AM +0200, Marcin Wojtas wrote:
> Hitherto PHY handling in Pp2Dxe was not flexible. It allowed for using
> only single MDIO controller, which may not be true on Armada 80x0 SoCs.
> For this purpose introduce the MDIO description, using the new structures
> and template in MvHwDescLib. This change enables addition of multiple
> CP110 hardware blocks with MDIO controllers.
>
> This change required different PHY handling and obtaining data over
> desired MDIO bus. Now given Pp2 port is matched with the PHY via
> its index in gMarvellTokenSpaceGuid.PcdPhyDeviceIds. The PHY itself
> is mapped to the MDIO controller, using
> gMarvellTokenSpaceGuid.PcdPhy2MdioController. Also obtaining
> SMI addresses was moved to the PHY initialization routine.
> All above allow for much cleaner and logical PHY description
> in the .dsc file.
>
> Update PortingGuide documentation accordingly and Armada 70x0 DB
> NIC/PHY description.
Like for previous patches, can we have:
- symbolic names for things that can be given symbolic names.
- Pcds describing boolean arrays have an "Enabled" appended to their
name?
/
Leif
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